[coreboot] New patch to review for coreboot: c5c03ce Intel e7505: provide get_top_of_ram

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2550

-gerrit

commit c5c03ce1dfb950e17b08bc923b7598be6668b5db
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Jul 3 11:36:44 2012 +0300

    Intel e7505: provide get_top_of_ram
    
    This is required to enable EARLY_CBMEM_INIT.
    
    Change-Id: I6d8caf382aa48eded81c1e94bbbcd3975ea88a1a
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/northbridge/intel/e7505/raminit.c | 6 ++++++
 src/northbridge/intel/e7505/raminit.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 2f558f5..9fba602 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -1889,6 +1889,12 @@ void e7505_mch_init(const struct mem_controller *memctrl)
 	sdram_enable(memctrl);
 }
 
+unsigned long get_top_of_ram(void)
+{
+	u32 tolm = (pci_read_config16(MCHDEV, TOLM) & ~0x7ff) << 16;
+	return (unsigned long) tolm;
+}
+
 /**
  * Scrub and reset error counts for ECC dimms.
  *
diff --git a/src/northbridge/intel/e7505/raminit.h b/src/northbridge/intel/e7505/raminit.h
index 8eb4990..f9ba796 100644
--- a/src/northbridge/intel/e7505/raminit.h
+++ b/src/northbridge/intel/e7505/raminit.h
@@ -20,6 +20,7 @@ void e7505_mch_scrub_ecc(unsigned long ret_addr);
 void e7505_mch_done(const struct mem_controller *memctrl);
 int e7505_mch_is_ready(void);
 
+unsigned long get_top_of_ram(void);
 
 /* Mainboard exports this. */
 int spd_read_byte(unsigned device, unsigned address);