[coreboot] Patch set updated for coreboot: 1cc2aa1 documentation: Complete the AMD-S3.txt

Zheng Bao (zheng.bao@amd.com) gerrit at coreboot.org
Fri Feb 22 05:35:26 CET 2013

Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2483


commit 1cc2aa13987688165e7d805f2e567b2259cd4fe4
Author: Zheng Bao <fishbaozi at gmail.com>
Date:   Fri Feb 22 12:40:10 2013 +0800

    documentation: Complete the AMD-S3.txt
    Fix some typos and finish empty sections.
    Change-Id: I08cc971e763252b035ab8ed2118180140e34ac72
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: Zheng Bao <fishbaozi at gmail.com>
 documentation/AMD-S3.txt | 26 +++++++++++++++++++++++---
 1 file changed, 23 insertions(+), 3 deletions(-)

diff --git a/documentation/AMD-S3.txt b/documentation/AMD-S3.txt
index 1ef87c0..ac996a9 100644
--- a/documentation/AMD-S3.txt
+++ b/documentation/AMD-S3.txt
@@ -22,7 +22,7 @@
 This document is about how the feature S3 is implemented on coreboot,
-specificly on AMD platform. This topic deals with ACPI spec, hardware,
+specifically on AMD platform. This topic deals with ACPI spec, hardware,
 BIOS, OS. We try to help coreboot users to realize their own S3.
 S3 in a nutshell
@@ -103,20 +103,40 @@ Lifecycle of booting, sleeping and waking Coreboot and Ubuntu
 1. Cold boot.
 For a system with S3 feature, the BIOS needs to save some data to
-non-volitile storage at cold boot stage. What data need to be save are
+non-volatile storage at cold boot stage. What data need to be save are
 provided by AmdS3Save. After the wrapper calls the AmdS3Save, it gets
 the VolatileStorage and NvStorage, which are where the data are
 located. It is the wrappers's responsibility to save the data.[3][4]
-Currently, the wrappers allocate a CBFS modules in BIOS image. Todo
+Currently, the wrappers allocate a CBFS modules in BIOS image. To do
 that, the wrapper needs to have the ability to write flash chips. It
 is not as comprehensive as flashrom. But for the SST chip on Parmer,
 MX chip on Thather, coreboot works well.[5]
 2. OS goes in S3.
+For Linux, besides the kernel need to do some saving, most distributions
+run some scripts. For Ubuntu, scripts are located at /usr/lib/pm-utils/sleep.d.
+  # ls /usr/lib/pm-utils/sleep.d
+   000kernel-change  49bluetooth        90clock       95led
+   00logging         55NetworkManager   94cpufreq     98video-quirk-db-handler
+   00powersave       60_wpa_supplicant  95anacron     99video
+   01PulseAudio      75modules          95hdparm-apm
+The script with lower prefix runs before the one with higher prefix.
+99video is the last one.
 3. BIOS detect S3 wakeup
+As we mentioned, BIOS detects the SLP_TYPx to find out if the board
+wakes up. In romstage.c, the AmdInitReset and AmdInitEarly are called
+as they are during cold boot. AmdInitResume and AmdS3LateRestore are
+called only during it resumes. For whole ramstage, Coreboot goes through
+almost the same way as cold boot, other than not calling the AmdInitMid,
+AmdInitLate and AmdS3Save, and restoring all the MTRRs.
+At last step of BIOS stage, coreboot find out the wakeup vector in FADT,
+written by OS, and jump.
 4. OS resumes.
+When Linux resume, all the sleeping scripts continues. If we are more lucky,
+all the scripts can go through. More chances that the 99video hangs or fails
+to get the display back. That needs more trouble shooting.

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