[coreboot] Patch set updated for coreboot: 8ef17cc AMD Fam15tn: dimmSpd.c: Introduce Kconfig variable `SMBUS0_BASE_ADDRESS`

Paul Menzel (paulepanter@users.sourceforge.net) gerrit at coreboot.org
Wed Feb 20 12:02:14 CET 2013


Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2459

-gerrit

commit 8ef17ccf3c344934f6ca40d5b74ba87357bfb442
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Tue Feb 19 14:46:31 2013 +0100

    AMD Fam15tn: dimmSpd.c: Introduce Kconfig variable `SMBUS0_BASE_ADDRESS`
    
    For AMD Inagua, the following two commits
    
        commit 01f7ab93359ae0fee5784d35effbcbe0b596df18
        Author: Kerry Sheh <shekairui at gmail.com>
        Date:   Thu Jan 19 13:18:36 2012 +0800
    
            Inagua: Synchronize AMD/inagua mainboard.
    
            Reviewed-on: http://review.coreboot.org/542
    
    and
    
        commit d91c9b7e3cb9fdaeb9399a21907996130f3120bb
        Author: efdesign98 <efdesign98 at gmail.com>
        Date:   Thu Sep 15 10:59:55 2011 -0600
    
            AMD Inagua platform updates
    
            Reviewed-on: http://review.coreboot.org/136
    
    replaced the constant, `iobase` is set to, by the define
    `SMBUS0_BASE_ADDRESS` from `OEM.h`.
    
    Do the something similar for AMD Fam15tn used by AMD Parmer and
    Thatcher. Though SB900 CIMX does not ship this header file.
    Therefore set it in Kconfig.
    
    Change-Id: I70dbf5b398e8abae1c20dc401f547abfe5b37a69
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/northbridge/amd/agesa/family15tn/Kconfig   | 4 ++++
 src/northbridge/amd/agesa/family15tn/dimmSpd.c | 3 ++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/northbridge/amd/agesa/family15tn/Kconfig b/src/northbridge/amd/agesa/family15tn/Kconfig
index 5f08593..3b67ada 100644
--- a/src/northbridge/amd/agesa/family15tn/Kconfig
+++ b/src/northbridge/amd/agesa/family15tn/Kconfig
@@ -39,4 +39,8 @@ config MMCONF_BUS_NUMBER
 	int
 	default 64
 
+config SMBUS0_BASE_ADDRESS
+	hex
+	default 0xB00
+
 endif
diff --git a/src/northbridge/amd/agesa/family15tn/dimmSpd.c b/src/northbridge/amd/agesa/family15tn/dimmSpd.c
index 8b62a39..36def55 100644
--- a/src/northbridge/amd/agesa/family15tn/dimmSpd.c
+++ b/src/northbridge/amd/agesa/family15tn/dimmSpd.c
@@ -26,6 +26,7 @@
 #include "amdlib.h"
 #include "dimmSpd.h"
 #include "chip.h"
+#include "OEM.h" /* SMBUS0_BASE_ADDRESS */
 
 
 #define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
@@ -154,7 +155,7 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
 		[info->SocketId] [info->MemChannelId] [info->DimmId];
 
 	if (spdAddress == 0) return AGESA_ERROR;
-	ioBase = 0xB00;
+	ioBase = CONFIG_SMBUS0_BASE_ADDRESS;
 	setupFch (ioBase);
 	return readspd (ioBase, spdAddress, (void *) info->Buffer, 128);
 }



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