[coreboot] New patch to review for coreboot: 6968de0 exynos/snow: move SPI GPIO setup to mainboard bootblock code

David Hendricks (dhendrix@chromium.org) gerrit at coreboot.org
Sun Feb 10 02:29:54 CET 2013


David Hendricks (dhendrix at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2347

-gerrit

commit 6968de0c1bbada0b9d71225b31fe67f781c8db20
Author: David Hendricks <dhendrix at chromium.org>
Date:   Sat Feb 9 17:24:17 2013 -0800

    exynos/snow: move SPI GPIO setup to mainboard bootblock code
    
    This moves GPIO setup from chip-specific SPI code to mainboard-
    specific bootblock code. This makes exynos_spi_open a bit more
    generic so it can eventually be used for any SPI channel. This
    also benefits CBFS since the user can set media->context to
    to any set of SPI registers.
    
    Change-Id: I2bcb9de370df0a79353c14b4d021b471ddebfacd
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
---
 src/cpu/samsung/exynos5-common/spi.c  | 11 +----------
 src/mainboard/google/snow/bootblock.c |  1 +
 2 files changed, 2 insertions(+), 10 deletions(-)

diff --git a/src/cpu/samsung/exynos5-common/spi.c b/src/cpu/samsung/exynos5-common/spi.c
index 90b74c0..0ea2dcd 100644
--- a/src/cpu/samsung/exynos5-common/spi.c
+++ b/src/cpu/samsung/exynos5-common/spi.c
@@ -81,21 +81,12 @@ static void exynos_spi_rx_tx(struct exynos_spi *regs, int todo,
 	}
 }
 
+/* set up SPI channel */
 int exynos_spi_open(struct exynos_spi *regs)
 {
 	clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */
 	/* set the spi1 GPIO */
 
-	// TODO Some of these should be done in board's bootblock file.
-	// We should fix-up the mainboard-specific vs. exynos-specific parts in a
-	// follow-up CL.
-
-//	exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE);
-	gpio_cfg_pin(GPIO_A24, 0x2);
-	gpio_cfg_pin(GPIO_A25, 0x2);
-	gpio_cfg_pin(GPIO_A26, 0x2);
-	gpio_cfg_pin(GPIO_A27, 0x2);
-
 	/* set pktcnt and enable it */
 	writel(4 | SPI_PACKET_CNT_EN, &regs->pkt_cnt);
 	/* set FB_CLK_SEL */
diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c
index 9725af3..17a3267 100644
--- a/src/mainboard/google/snow/bootblock.c
+++ b/src/mainboard/google/snow/bootblock.c
@@ -30,6 +30,7 @@
 void bootblock_mainboard_init(void);
 void bootblock_mainboard_init(void)
 {
+	exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE);
 #if CONFIG_EARLY_CONSOLE
 	exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
 	console_init();



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