[coreboot] New patch to review for coreboot: 2eeda3b armv7/exynos: make BL1_SIZE_KB consistent with numbers used...

David Hendricks (dhendrix@chromium.org) gerrit at coreboot.org
Sat Feb 9 22:53:13 CET 2013


David Hendricks (dhendrix at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2341

-gerrit

commit 2eeda3b77d889ac4b2066676b3cfb7cd884ab342
Author: David Hendricks <dhendrix at chromium.org>
Date:   Sat Feb 9 13:51:55 2013 -0800

    armv7/exynos: make BL1_SIZE_KB consistent with numbers used...
    
    The Kconfig variable indicates KB, but the number used was bytes.
    Let's just assume KB is correct for now.
    
    Change-Id: I910c126104f0222fc48b70a18df943f2afddeca3
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
---
 src/arch/armv7/bootblock.inc       | 2 +-
 src/arch/armv7/bootblock.lds       | 2 +-
 src/cpu/samsung/exynos5250/Kconfig | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/arch/armv7/bootblock.inc b/src/arch/armv7/bootblock.inc
index 82d801e..25cc8c6 100644
--- a/src/arch/armv7/bootblock.inc
+++ b/src/arch/armv7/bootblock.inc
@@ -36,7 +36,7 @@ _bl1:
 	 * on ARM, which is 8KB in size and it is prepended to the
 	 * reset vector
 	 */
-	.skip CONFIG_BL1_SIZE_KB
+	.skip (CONFIG_BL1_SIZE_KB * 1024)
 
 .globl _start
 _start: b	reset
diff --git a/src/arch/armv7/bootblock.lds b/src/arch/armv7/bootblock.lds
index fc58601..9482cef 100644
--- a/src/arch/armv7/bootblock.lds
+++ b/src/arch/armv7/bootblock.lds
@@ -25,7 +25,7 @@ OUTPUT_ARCH(arm)
 TARGET(binary)
 SECTIONS
 {
-	ROMLOC = CONFIG_BOOTBLOCK_BASE - CONFIG_BL1_SIZE_KB;
+	ROMLOC = CONFIG_BOOTBLOCK_BASE - (CONFIG_BL1_SIZE_KB * 1024);
 
 	/* This section might be better named .setup */
 	.rom ROMLOC : {
diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig
index 3e61087..357817e 100644
--- a/src/cpu/samsung/exynos5250/Kconfig
+++ b/src/cpu/samsung/exynos5250/Kconfig
@@ -16,7 +16,7 @@ config SATA_AHCI
 
 config BL1_SIZE_KB
 	int
-	default 8192
+	default 8
 
 # Example SRAM/iRAM map for Exynos5250 platform:
 #



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