[coreboot] New patch to review for coreboot: f834070 snow: do something useful in ramstage()
David Hendricks (dhendrix@chromium.org)
gerrit at coreboot.org
Sat Feb 9 03:07:05 CET 2013
David Hendricks (dhendrix at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2328
-gerrit
commit f834070d554e3558292183874aca559fd4b3a6e5
Author: David Hendricks <dhendrix at chromium.org>
Date: Fri Feb 8 18:04:59 2013 -0800
snow: do something useful in ramstage()
This cleans up Snow's trivial ramstage, gives it a coreboot table
address and calls hardwaremain().
Change-Id: I84c904bcfd57a5f9eb3969de8a496f01e43bc2f6
Signed-off-by: David Hendricks <dhendrix at chromium.org>
---
src/mainboard/google/snow/ramstage.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c
index f9d9c96..d280dbe 100644
--- a/src/mainboard/google/snow/ramstage.c
+++ b/src/mainboard/google/snow/ramstage.c
@@ -19,12 +19,21 @@
#include <console/console.h>
+#if CONFIG_WRITE_HIGH_TABLES
+#include <cbmem.h>
+#endif
+
+void hardwaremain(int boot_complete);
void main(void)
{
-// volatile unsigned long *pshold = (unsigned long *)0x1004330c;
-// *pshold &= ~0x100; /* shut down */
-
console_init();
printk(BIOS_INFO, "hello from ramstage\n");
- while (1);
+
+#if CONFIG_WRITE_HIGH_TABLES
+ /* Leave some space for ACPI tables */
+ high_tables_base = CONFIG_RAMBASE;
+ high_tables_size = CONFIG_RAMBASE + 0x100000;
+#endif
+
+ hardwaremain(0);
}
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