[coreboot] New patch to review for coreboot: 47bc079 spi.h: Rename the spi.h to spi-generic.h
Zheng Bao (zheng.bao@amd.com)
gerrit at coreboot.org
Thu Feb 7 10:27:17 CET 2013
Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2309
-gerrit
commit 47bc0798c515a9b6611a7b619c5f7f5849075552
Author: Zheng Bao <fishbaozi at gmail.com>
Date: Thu Feb 7 17:30:23 2013 +0800
spi.h: Rename the spi.h to spi-generic.h
Since there are and will be other files in nb/sb folders, we change
the general spi.h to a file name which is not easy to be duplicated.
Change-Id: I6548a81206caa608369be044747bde31e2b08d1a
Signed-off-by: Zheng Bao <zheng.bao at amd.com>
Signed-off-by: zbao <fishbaozi at gmail.com>
---
src/cpu/amd/agesa/s3_resume.c | 2 +-
src/drivers/elog/elog.c | 2 +-
src/drivers/spi/spi_flash.c | 2 +-
src/include/spi-generic.h | 204 +++++++++++++++++++++++++++
src/include/spi.h | 204 ---------------------------
src/include/spi_flash.h | 2 +-
src/northbridge/intel/sandybridge/mrccache.c | 2 +-
src/southbridge/amd/agesa/hudson/spi.c | 2 +-
src/southbridge/amd/cimx/sb800/SBPLATFORM.h | 2 +-
src/southbridge/amd/cimx/sb800/spi.c | 2 +-
src/southbridge/intel/bd82x6x/finalize.c | 2 +-
src/southbridge/intel/bd82x6x/spi.c | 2 +-
12 files changed, 214 insertions(+), 214 deletions(-)
diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c
index 42e950f..dd90184 100644
--- a/src/cpu/amd/agesa/s3_resume.c
+++ b/src/cpu/amd/agesa/s3_resume.c
@@ -41,7 +41,7 @@
#include "agesawrapper.h"
#ifndef __PRE_RAM__
-#include <spi.h>
+#include <spi-generic.h>
#include <spi_flash.h>
#endif
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
index e6baace..1a794d9 100644
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -22,7 +22,7 @@
#include <console/console.h>
#include <pc80/mc146818rtc.h>
#include <smbios.h>
-#include <spi.h>
+#include <spi-generic.h>
#include <spi_flash.h>
#include <stdint.h>
#include <string.h>
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index 6b658f8..d1a9504 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -9,7 +9,7 @@
#include <stdlib.h>
#include <string.h>
-#include <spi.h>
+#include <spi-generic.h>
#include <spi_flash.h>
#include <delay.h>
#ifdef __SMM__
diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h
new file mode 100644
index 0000000..d394531
--- /dev/null
+++ b/src/include/spi-generic.h
@@ -0,0 +1,204 @@
+/*
+ * (C) Copyright 2001
+ * Gerald Van Baren, Custom IDEAS, vanbaren at cideas.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SPI_H_
+#define _SPI_H_
+
+#include <stdint.h>
+
+/* Controller-specific definitions: */
+
+/* SPI mode flags */
+#define SPI_CPHA 0x01 /* clock phase */
+#define SPI_CPOL 0x02 /* clock polarity */
+#define SPI_MODE_0 (0|0) /* (original MicroWire) */
+#define SPI_MODE_1 (0|SPI_CPHA)
+#define SPI_MODE_2 (SPI_CPOL|0)
+#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
+#define SPI_CS_HIGH 0x04 /* CS active high */
+#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
+#define SPI_3WIRE 0x10 /* SI/SO signals shared */
+#define SPI_LOOP 0x20 /* loopback mode */
+
+/* SPI transfer flags */
+#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */
+#define SPI_XFER_END 0x02 /* Deassert CS after transfer */
+
+/* SPI opcodes */
+#define SPI_OPCODE_WREN 0x06
+#define SPI_OPCODE_FAST_READ 0x0b
+
+#define SPI_READ_FLAG 0x01
+#define SPI_WRITE_FLAG 0x02
+
+/*-----------------------------------------------------------------------
+ * Representation of a SPI slave, i.e. what we're communicating with.
+ *
+ * Drivers are expected to extend this with controller-specific data.
+ *
+ * bus: ID of the bus that the slave is attached to.
+ * cs: ID of the chip select connected to the slave.
+ * rw: Read or Write flag
+ */
+struct spi_slave {
+ unsigned int bus;
+ unsigned int cs;
+ unsigned int rw;
+};
+
+/*-----------------------------------------------------------------------
+ * Initialization, must be called once on start up.
+ *
+ */
+void spi_init(void);
+
+/*-----------------------------------------------------------------------
+ * Set up communications parameters for a SPI slave.
+ *
+ * This must be called once for each slave. Note that this function
+ * usually doesn't touch any actual hardware, it only initializes the
+ * contents of spi_slave so that the hardware can be easily
+ * initialized later.
+ *
+ * bus: Bus ID of the slave chip.
+ * cs: Chip select ID of the slave chip on the specified bus.
+ * max_hz: Maximum SCK rate in Hz.
+ * mode: Clock polarity, clock phase and other parameters.
+ *
+ * Returns: A spi_slave reference that can be used in subsequent SPI
+ * calls, or NULL if one or more of the parameters are not supported.
+ */
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode);
+
+/*-----------------------------------------------------------------------
+ * Claim the bus and prepare it for communication with a given slave.
+ *
+ * This must be called before doing any transfers with a SPI slave. It
+ * will enable and initialize any SPI hardware as necessary, and make
+ * sure that the SCK line is in the correct idle state. It is not
+ * allowed to claim the same bus for several slaves without releasing
+ * the bus in between.
+ *
+ * slave: The SPI slave
+ *
+ * Returns: 0 if the bus was claimed successfully, or a negative value
+ * if it wasn't.
+ */
+int spi_claim_bus(struct spi_slave *slave);
+
+/*-----------------------------------------------------------------------
+ * Release the SPI bus
+ *
+ * This must be called once for every call to spi_claim_bus() after
+ * all transfers have finished. It may disable any SPI hardware as
+ * appropriate.
+ *
+ * slave: The SPI slave
+ */
+void spi_release_bus(struct spi_slave *slave);
+
+/*-----------------------------------------------------------------------
+ * SPI transfer
+ *
+ * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
+ * "bitlen" bits in the SPI MISO port. That's just the way SPI works.
+ *
+ * The source of the outgoing bits is the "dout" parameter and the
+ * destination of the input bits is the "din" parameter. Note that "dout"
+ * and "din" can point to the same memory location, in which case the
+ * input data overwrites the output data (since both are buffered by
+ * temporary variables, this is OK).
+ *
+ * spi_xfer() interface:
+ * slave: The SPI slave which will be sending/receiving the data.
+ * dout: Pointer to a string of bits to send out. The bits are
+ * held in a byte array and are sent MSB first.
+ * bitsout: How many bits to write.
+ * din: Pointer to a string of bits that will be filled in.
+ * bitsin: How many bits to read.
+ *
+ * Returns: 0 on success, not 0 on failure
+ */
+int spi_xfer(struct spi_slave *slave, const void *dout, unsigned int bitsout,
+ void *din, unsigned int bitsin);
+
+/*-----------------------------------------------------------------------
+ * Determine if a SPI chipselect is valid.
+ * This function is provided by the board if the low-level SPI driver
+ * needs it to determine if a given chipselect is actually valid.
+ *
+ * Returns: 1 if bus:cs identifies a valid chip on this board, 0
+ * otherwise.
+ */
+int spi_cs_is_valid(unsigned int bus, unsigned int cs);
+
+/*-----------------------------------------------------------------------
+ * Activate a SPI chipselect.
+ * This function is provided by the board code when using a driver
+ * that can't control its chipselects automatically (e.g.
+ * common/soft_spi.c). When called, it should activate the chip select
+ * to the device identified by "slave".
+ */
+void spi_cs_activate(struct spi_slave *slave);
+
+/*-----------------------------------------------------------------------
+ * Deactivate a SPI chipselect.
+ * This function is provided by the board code when using a driver
+ * that can't control its chipselects automatically (e.g.
+ * common/soft_spi.c). When called, it should deactivate the chip
+ * select to the device identified by "slave".
+ */
+void spi_cs_deactivate(struct spi_slave *slave);
+
+/*-----------------------------------------------------------------------
+ * Set transfer speed.
+ * This sets a new speed to be applied for next spi_xfer().
+ * slave: The SPI slave
+ * hz: The transfer speed
+ */
+void spi_set_speed(struct spi_slave *slave, uint32_t hz);
+
+/*-----------------------------------------------------------------------
+ * Write 8 bits, then read 8 bits.
+ * slave: The SPI slave we're communicating with
+ * byte: Byte to be written
+ *
+ * Returns: The value that was read, or a negative value on error.
+ *
+ * TODO: This function probably shouldn't be inlined.
+ */
+static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
+{
+ unsigned char dout[2];
+ unsigned char din[2];
+ int ret;
+
+ dout[0] = byte;
+ dout[1] = 0;
+
+ ret = spi_xfer(slave, dout, 16, din, 16);
+ return ret < 0 ? ret : din[1];
+}
+
+#endif /* _SPI_H_ */
diff --git a/src/include/spi.h b/src/include/spi.h
deleted file mode 100644
index d394531..0000000
--- a/src/include/spi.h
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * (C) Copyright 2001
- * Gerald Van Baren, Custom IDEAS, vanbaren at cideas.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _SPI_H_
-#define _SPI_H_
-
-#include <stdint.h>
-
-/* Controller-specific definitions: */
-
-/* SPI mode flags */
-#define SPI_CPHA 0x01 /* clock phase */
-#define SPI_CPOL 0x02 /* clock polarity */
-#define SPI_MODE_0 (0|0) /* (original MicroWire) */
-#define SPI_MODE_1 (0|SPI_CPHA)
-#define SPI_MODE_2 (SPI_CPOL|0)
-#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
-#define SPI_CS_HIGH 0x04 /* CS active high */
-#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
-#define SPI_3WIRE 0x10 /* SI/SO signals shared */
-#define SPI_LOOP 0x20 /* loopback mode */
-
-/* SPI transfer flags */
-#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */
-#define SPI_XFER_END 0x02 /* Deassert CS after transfer */
-
-/* SPI opcodes */
-#define SPI_OPCODE_WREN 0x06
-#define SPI_OPCODE_FAST_READ 0x0b
-
-#define SPI_READ_FLAG 0x01
-#define SPI_WRITE_FLAG 0x02
-
-/*-----------------------------------------------------------------------
- * Representation of a SPI slave, i.e. what we're communicating with.
- *
- * Drivers are expected to extend this with controller-specific data.
- *
- * bus: ID of the bus that the slave is attached to.
- * cs: ID of the chip select connected to the slave.
- * rw: Read or Write flag
- */
-struct spi_slave {
- unsigned int bus;
- unsigned int cs;
- unsigned int rw;
-};
-
-/*-----------------------------------------------------------------------
- * Initialization, must be called once on start up.
- *
- */
-void spi_init(void);
-
-/*-----------------------------------------------------------------------
- * Set up communications parameters for a SPI slave.
- *
- * This must be called once for each slave. Note that this function
- * usually doesn't touch any actual hardware, it only initializes the
- * contents of spi_slave so that the hardware can be easily
- * initialized later.
- *
- * bus: Bus ID of the slave chip.
- * cs: Chip select ID of the slave chip on the specified bus.
- * max_hz: Maximum SCK rate in Hz.
- * mode: Clock polarity, clock phase and other parameters.
- *
- * Returns: A spi_slave reference that can be used in subsequent SPI
- * calls, or NULL if one or more of the parameters are not supported.
- */
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
- unsigned int max_hz, unsigned int mode);
-
-/*-----------------------------------------------------------------------
- * Claim the bus and prepare it for communication with a given slave.
- *
- * This must be called before doing any transfers with a SPI slave. It
- * will enable and initialize any SPI hardware as necessary, and make
- * sure that the SCK line is in the correct idle state. It is not
- * allowed to claim the same bus for several slaves without releasing
- * the bus in between.
- *
- * slave: The SPI slave
- *
- * Returns: 0 if the bus was claimed successfully, or a negative value
- * if it wasn't.
- */
-int spi_claim_bus(struct spi_slave *slave);
-
-/*-----------------------------------------------------------------------
- * Release the SPI bus
- *
- * This must be called once for every call to spi_claim_bus() after
- * all transfers have finished. It may disable any SPI hardware as
- * appropriate.
- *
- * slave: The SPI slave
- */
-void spi_release_bus(struct spi_slave *slave);
-
-/*-----------------------------------------------------------------------
- * SPI transfer
- *
- * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
- * "bitlen" bits in the SPI MISO port. That's just the way SPI works.
- *
- * The source of the outgoing bits is the "dout" parameter and the
- * destination of the input bits is the "din" parameter. Note that "dout"
- * and "din" can point to the same memory location, in which case the
- * input data overwrites the output data (since both are buffered by
- * temporary variables, this is OK).
- *
- * spi_xfer() interface:
- * slave: The SPI slave which will be sending/receiving the data.
- * dout: Pointer to a string of bits to send out. The bits are
- * held in a byte array and are sent MSB first.
- * bitsout: How many bits to write.
- * din: Pointer to a string of bits that will be filled in.
- * bitsin: How many bits to read.
- *
- * Returns: 0 on success, not 0 on failure
- */
-int spi_xfer(struct spi_slave *slave, const void *dout, unsigned int bitsout,
- void *din, unsigned int bitsin);
-
-/*-----------------------------------------------------------------------
- * Determine if a SPI chipselect is valid.
- * This function is provided by the board if the low-level SPI driver
- * needs it to determine if a given chipselect is actually valid.
- *
- * Returns: 1 if bus:cs identifies a valid chip on this board, 0
- * otherwise.
- */
-int spi_cs_is_valid(unsigned int bus, unsigned int cs);
-
-/*-----------------------------------------------------------------------
- * Activate a SPI chipselect.
- * This function is provided by the board code when using a driver
- * that can't control its chipselects automatically (e.g.
- * common/soft_spi.c). When called, it should activate the chip select
- * to the device identified by "slave".
- */
-void spi_cs_activate(struct spi_slave *slave);
-
-/*-----------------------------------------------------------------------
- * Deactivate a SPI chipselect.
- * This function is provided by the board code when using a driver
- * that can't control its chipselects automatically (e.g.
- * common/soft_spi.c). When called, it should deactivate the chip
- * select to the device identified by "slave".
- */
-void spi_cs_deactivate(struct spi_slave *slave);
-
-/*-----------------------------------------------------------------------
- * Set transfer speed.
- * This sets a new speed to be applied for next spi_xfer().
- * slave: The SPI slave
- * hz: The transfer speed
- */
-void spi_set_speed(struct spi_slave *slave, uint32_t hz);
-
-/*-----------------------------------------------------------------------
- * Write 8 bits, then read 8 bits.
- * slave: The SPI slave we're communicating with
- * byte: Byte to be written
- *
- * Returns: The value that was read, or a negative value on error.
- *
- * TODO: This function probably shouldn't be inlined.
- */
-static inline int spi_w8r8(struct spi_slave *slave, unsigned char byte)
-{
- unsigned char dout[2];
- unsigned char din[2];
- int ret;
-
- dout[0] = byte;
- dout[1] = 0;
-
- ret = spi_xfer(slave, dout, 16, din, 16);
- return ret < 0 ? ret : din[1];
-}
-
-#endif /* _SPI_H_ */
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h
index b84bd96..6fd9f13 100644
--- a/src/include/spi_flash.h
+++ b/src/include/spi_flash.h
@@ -26,7 +26,7 @@
#include <stdint.h>
#include <stddef.h>
#include <console/console.h>
-#include <spi.h>
+#include <spi-generic.h>
/**
* container_of - cast a member of a structure out to the containing structure
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index 30d28ad..ea3b38d 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -26,7 +26,7 @@
#include <cbmem.h>
#include "pei_data.h"
#include "sandybridge.h"
-#include <spi.h>
+#include <spi-generic.h>
#include <spi_flash.h>
#if CONFIG_CHROMEOS
#include <vendorcode/google/chromeos/fmap.h>
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index aebe4b5..dabf8b7 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -20,7 +20,7 @@
#include <stdlib.h>
#include <string.h>
#include <arch/io.h>
-#include <spi.h>
+#include <spi-generic.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
index 1966eb4..a8c3b61 100644
--- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
+++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h
@@ -163,7 +163,7 @@ typedef union _PCI_ADDR {
#include "vendorcode/amd/cimx/sb800/AMDSBLIB.h"
#if CONFIG_HAVE_ACPI_RESUME
-#include "spi.h"
+#include <spi-generic.h>
#endif
#define BIOSRAM_INDEX 0xcd4
diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c
index 46cc741..d4b80f9 100644
--- a/src/southbridge/amd/cimx/sb800/spi.c
+++ b/src/southbridge/amd/cimx/sb800/spi.c
@@ -20,7 +20,7 @@
#include <stdlib.h>
#include <string.h>
#include <arch/io.h>
-#include <spi.h>
+#include <spi-generic.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/southbridge/intel/bd82x6x/finalize.c b/src/southbridge/intel/bd82x6x/finalize.c
index 4a4f021..f627972 100644
--- a/src/southbridge/intel/bd82x6x/finalize.c
+++ b/src/southbridge/intel/bd82x6x/finalize.c
@@ -23,7 +23,7 @@
#include <console/post_codes.h>
#include <northbridge/intel/sandybridge/pcie_config.c>
#include "pch.h"
-#include "spi.h"
+#include <spi-generic.h>
void intel_pch_finalize_smm(void)
{
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c
index 05649fc..4303dd0 100644
--- a/src/southbridge/intel/bd82x6x/spi.c
+++ b/src/southbridge/intel/bd82x6x/spi.c
@@ -29,7 +29,7 @@
#include <console/console.h>
#include <device/pci_ids.h>
-#include <spi.h>
+#include <spi-generic.h>
#define min(a, b) ((a)<(b)?(a):(b))
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