[coreboot] New patch to review for coreboot: 58e1bbc armv7: Clean up: femove "SPL_BUILD" configuation.

Wed Feb 6 13:45:29 CET 2013

Hung-Te Lin (hungte at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2297

-gerrit

commit 58e1bbc8e1cfc26d0880d9c9f5b6666bfce8fbc3
Author: Hung-Te Lin <hungte at chromium.org>
Date:   Wed Feb 6 17:48:20 2013 +0800

    armv7: Clean up: femove "SPL_BUILD" configuation.
    
    "SPL" in U-Boot is almost identical to bootblock in coreboot, so we don't need
    it anymore.
    
    Change-Id: Id16877075d0b870839a10160073ad70777a2af0a
    Signed-off-by: Hung-Te Lin <hungte at chromium.org>
---
 src/arch/armv7/Kconfig                  | 4 ----
 src/arch/armv7/lib/eabi_compat.c        | 5 ++---
 src/cpu/samsung/exynos5250/Kconfig      | 4 ----
 src/cpu/samsung/exynos5250/clk.h        | 3 ---
 src/cpu/samsung/exynos5250/clock_init.c | 2 --
 src/cpu/samsung/s5p-common/cpu_info.c   | 2 +-
 src/cpu/samsung/s5p-common/s5p_gpio.c   | 2 --
 src/cpu/samsung/s5p-common/timer.c      | 3 +--
 8 files changed, 4 insertions(+), 21 deletions(-)

diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig
index 65de2d5..488ca97 100644
--- a/src/arch/armv7/Kconfig
+++ b/src/arch/armv7/Kconfig
@@ -1,9 +1,5 @@
 menu "Architecture (armv7)"
 
-config SPL_BUILD
-	bool "Build second-phase bootloader (SPL)"
-	default y
-
 config EABI_COMPAT
 	bool "Toolchain is EABI compatible"
 	default n
diff --git a/src/arch/armv7/lib/eabi_compat.c b/src/arch/armv7/lib/eabi_compat.c
index 5f59892..2772de6 100644
--- a/src/arch/armv7/lib/eabi_compat.c
+++ b/src/arch/armv7/lib/eabi_compat.c
@@ -10,14 +10,13 @@
  */
 
 #include <common.h>
+#include <console/console.h>
 
 /* FIXME(dhendrix): prototypes added for assembler */
 int raise (int signum);
 int raise (int signum)
 {
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
-	printf("raise: Signal # %d caught\n", signum);
-#endif
+	printk(BIOS_CRIT, "raise: Signal # %d caught\n", signum);
 	return 0;
 }
 
diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig
index 6a09d88..0b07b90 100644
--- a/src/cpu/samsung/exynos5250/Kconfig
+++ b/src/cpu/samsung/exynos5250/Kconfig
@@ -88,10 +88,6 @@ config SYS_SDRAM_BASE
 	hex "SDRAM base address"
 	default 0x40000000
 
-config SPL_BUILD
-	bool
-	default n
-
 config SYS_TEXT_BASE
 	hex "Executable code section"
 	default 0x43e00000
diff --git a/src/cpu/samsung/exynos5250/clk.h b/src/cpu/samsung/exynos5250/clk.h
index 2de949a..dbddce0 100644
--- a/src/cpu/samsung/exynos5250/clk.h
+++ b/src/cpu/samsung/exynos5250/clk.h
@@ -564,8 +564,6 @@ const char *clock_get_mem_manuf_name(enum mem_manuf mem_manuf);
  * At present we are using 14148 of 14336 bytes. If we change this function
  * to be exported in SPL, we go over the edge.
  */
-/* TODO(dhendrix): do we still need this ifndef? */
-//#ifndef CONFIG_SPL_BUILD
 /**
  * Get the required memory type and speed (Main U-Boot version).
  *
@@ -581,6 +579,5 @@ const char *clock_get_mem_manuf_name(enum mem_manuf mem_manuf);
 int clock_get_mem_selection(enum ddr_mode *mem_type,
 		unsigned *frequency_mhz, unsigned *arm_freq,
 		enum mem_manuf *mem_manuf);
-//#endif /* CONFIG_SPL_BUILD */
 
 #endif
diff --git a/src/cpu/samsung/exynos5250/clock_init.c b/src/cpu/samsung/exynos5250/clock_init.c
index 4f21022..27e96ae 100644
--- a/src/cpu/samsung/exynos5250/clock_init.c
+++ b/src/cpu/samsung/exynos5250/clock_init.c
@@ -452,7 +452,6 @@ void clock_init_dp_clock(void)
 	setbits_le32(&clk->div_disp1_0, CLK_DIV_DISP1_0_FIMD1);
 }
 
-#ifdef CONFIG_SPL_BUILD
 /*
  * This is a custom implementation for the udelay(), as we do not the timer
  * initialise during the SPL boot. We are assuming the cpu takes 3 instruction
@@ -466,4 +465,3 @@ void udelay(unsigned usec)
 	count = usec * (get_pll_clk(APLL) / (3 * 10000000));
 	sdelay(count);
 }
-#endif
diff --git a/src/cpu/samsung/s5p-common/cpu_info.c b/src/cpu/samsung/s5p-common/cpu_info.c
index 6b4742e..1c4c49f 100644
--- a/src/cpu/samsung/s5p-common/cpu_info.c
+++ b/src/cpu/samsung/s5p-common/cpu_info.c
@@ -92,7 +92,7 @@ int print_cpuinfo(void)
 }
 #endif
 
-#ifndef CONFIG_SPL_BUILD
+#if 0
 void board_show_dram(ulong size)
 {
 	enum ddr_mode mem_type;
diff --git a/src/cpu/samsung/s5p-common/s5p_gpio.c b/src/cpu/samsung/s5p-common/s5p_gpio.c
index 0023beb..e91b9df 100644
--- a/src/cpu/samsung/s5p-common/s5p_gpio.c
+++ b/src/cpu/samsung/s5p-common/s5p_gpio.c
@@ -95,9 +95,7 @@ static struct s5p_gpio_bank *gpio_get_bank(unsigned int gpio)
 		}
 	}
 
-#ifndef CONFIG_SPL_BUILD
 	assert(gpio < GPIO_MAX_PORT);	/* ...which it will not be */
-#endif
 	return NULL;
 }
 //#endif
diff --git a/src/cpu/samsung/s5p-common/timer.c b/src/cpu/samsung/s5p-common/timer.c
index 373c374..c6ed830 100644
--- a/src/cpu/samsung/s5p-common/timer.c
+++ b/src/cpu/samsung/s5p-common/timer.c
@@ -67,7 +67,7 @@ int init_timer(void)
 		pwm_init(4, MUX_DIV_4, 0);
 		pwm_config(4, 100000, 100000);
 		pwm_enable(4);
-#ifndef CONFIG_SPL_BUILD
+
 		/* Use this as the current monotonic time in us */
 		//gd->timer_reset_value = 0;
 		timer_reset_value = 0;
@@ -75,7 +75,6 @@ int init_timer(void)
 		/* Use this as the last timer value we saw */
 		//gd->lastinc = timer_get_us_down();
 		lastinc = timer_get_us_down();
-#endif
 	}
 
 	return 0;

