[coreboot] New patch to review for coreboot: 69d861a bootblock: Reduce register load

[Patrick Georgi (patrick@georgi-clan.de)]

Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2296

-gerrit

commit 69d861a6fbb689193cfcbafef8597fc655315df3
Author: Patrick Georgi <patrick at georgi-clan.de>
Date:   Wed Feb 6 11:37:08 2013 +0100

    bootblock: Reduce register load
    
    The common part of the bootblock resets the nvram data if it's found
    to be invalid. Since that code is compiled with romcc in i386 mode,
    there's a shortage on registers.
    
    Try to reduce the strain by doing things smarter: cmos_write_inner
    is the same as cmos_write, just that it doesn't check if the RTC is
    disabled. Since we just disabled it before, we can assume that it is so.
    
    Change-Id: Ic85eb2a5df949d1c1aff654bc1b40d6f2ff71756
    Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
---
 src/arch/x86/include/bootblock_common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/arch/x86/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h
index c24b5b0..11fb230 100644
--- a/src/arch/x86/include/bootblock_common.h
+++ b/src/arch/x86/include/bootblock_common.h
@@ -39,7 +39,7 @@ static void sanitize_cmos(void)
 			int i;
 			cmos_disable_rtc();
 			for (i = 14; i < 128; i++) {
-				cmos_write(cmos_default[i], i);
+				cmos_write_inner(cmos_default[i], i);
 			}
 			cmos_enable_rtc();
 		}