[coreboot] Patch set updated for coreboot: fbc9bc1 superio winbond w83627dhg: add a function which is used on tyan s8226

[Siyuan Wang (wangsiyuanbuaa@gmail.com)]

Siyuan Wang (wangsiyuanbuaa at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1494

-gerrit

commit fbc9bc1318c6ee554f0827fadd148d779173b59d
Author: Siyuan Wang <wangsiyuanbuaa at gmail.com>
Date:   Fri Sep 7 19:18:16 2012 +0800

    superio winbond w83627dhg: add a function which is used on tyan s8226
    
    this function is used on serial output of tyan s8226
    
    Change-Id: I5f7fa535b922b224e381886f1bea64623fa549ef
    Signed-off-by: Siyuan Wang <SiYuan.Wang at amd.com>
    Signed-off-by: Siyuan Wang <wangsiyuanbuaa at gmail.com>
---
 src/superio/winbond/w83627dhg/early_serial.c | 10 ++++++++++
 src/superio/winbond/w83627dhg/w83627dhg.h    |  1 +
 2 files changed, 11 insertions(+)

diff --git a/src/superio/winbond/w83627dhg/early_serial.c b/src/superio/winbond/w83627dhg/early_serial.c
index e0be8de..39ce8bf 100644
--- a/src/superio/winbond/w83627dhg/early_serial.c
+++ b/src/superio/winbond/w83627dhg/early_serial.c
@@ -67,3 +67,13 @@ void w83627dhg_enable_i2c(device_t dev)
 	pnp_exit_ext_func_mode(dev);
 }
 
+void w83627dhg_set_clksel_48(device_t dev)
+{
+	u8 reg8;
+
+	pnp_enter_ext_func_mode(dev);
+	reg8 = pnp_read_config(dev, 0x24);
+	reg8 |= (1 << 6); /* Set CLKSEL (clock input on pin 1) to 48MHz. */
+	pnp_write_config(dev, 0x24, reg8);
+	pnp_exit_ext_func_mode(dev);
+}
diff --git a/src/superio/winbond/w83627dhg/w83627dhg.h b/src/superio/winbond/w83627dhg/w83627dhg.h
index 158e60b..3aa1b26 100644
--- a/src/superio/winbond/w83627dhg/w83627dhg.h
+++ b/src/superio/winbond/w83627dhg/w83627dhg.h
@@ -56,5 +56,6 @@ void pnp_enter_ext_func_mode(device_t dev);
 void pnp_exit_ext_func_mode(device_t dev);
 void w83627dhg_enable_serial(device_t dev, u16 iobase);
 void w83627dhg_enable_i2c(device_t dev);
+void w83627dhg_set_clksel_48(device_t dev);
 
 #endif