[coreboot] Patch merged into coreboot/master: df28e7e VIA Nano: Add support for VIA Nano CPUs

gerrit at coreboot.org gerrit at coreboot.org
Wed Sep 5 03:43:03 CEST 2012

the following patch was just integrated into master:
commit df28e7ec541ab07bdf1814720c4302e7b2bab1ba
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Tue Aug 7 19:38:32 2012 -0500

    VIA Nano: Add support for VIA Nano CPUs
    Add code to do the following for the VIA Nano CPUs
    - Update microcode
    - Set maximum frequency
    - Initialize power states
    - Set up cache
    Attempting to change the voltage or frequency of the CPU without
    applying the microcode update will hang the CPU, so we only do
    transitions if we can verify the microcode has been updated.
    The microcode is updated directly from CBFS. No microcode is
    included in ramstage. The microcode is not included in this
    To get the microcode, run bios_extract on the manufacturer supplied
    BIOS, and look for the file marked "P6 Microcode". Include this
    file in CBFS.
    You can have the build system include this file automatically by
    selecting Expert Mode, then look under
    'Chipset' -> 'Include CPU microcode in CBFS' ->
    Include external microcode file (check)
    'Path and filename of CPU microcode' should contain the location of
    the microcode file previously extracted.
    Change-Id: I586aaca5715e047b42ef901d66772ace0e6b655e
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>

Build-Tested: build bot (Jenkins) at Mon Aug 27 09:30:54 2012, giving +1
Reviewed-By: Alexandru Gagniuc <mr.nuke.me at gmail.com> at Wed Sep  5 03:43:02 2012, giving +2
See http://review.coreboot.org/1257 for details.


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