[coreboot] Generic AMD E350 Support

Peter Stuge peter at stuge.se
Thu Oct 18 01:32:17 CEST 2012

Graeme Russ wrote:
> > Unsure. You would then be powering one of the 3v3 rails (where the
> > flash chip is connected) from the programmer, without powering any
> > other rail on the board. The southbridge may not like it at all
> > when your programmer drives the SPI pins in that state.
> Hmmm, I wonder what the potential for permanent damage is?

I also don't know. It depends on what the IO drivers are like in the

> So to be safe:
>  - Jumper the front panel reset pins
>  - Power-on the motherboard
>  - Do a current test from VCC to each of the CS#, HOLD#, WP#, SCLK,
> SI, and SO pins

To be really safe test both from VCC to pin, as well as from pin to GND.

HOLD# and WP# are never really used, and you don't even have to
connect them to the programmer.

>  - Connect the programmer without connecting the programmers VCC
>  - Program the chip

Yep, that's it.


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