[coreboot] #188: gcc-4.7 miscompiles coreboot on -Os, -O1, -O2, -O3 in 3 different ways

Hristo Venev mustrumr97 at gmail.com
Mon Oct 15 22:29:18 CEST 2012

It turned out that gcc was trying to use a xmm register. But I had set
coreboot to
build for qemu. This means SSE is disabled. If I enable SSE from
.config, it gets
initialized in romstage (I think) so it even compiles with gcc
-march=corei7 -O3.
Maybe -march should be set by Kconfig according to the CPU.
On Mon, Oct 15, 2012 at 10:56 PM, Idwer Vollering <vidwer at gmail.com> wrote:
> Please reply with "reply to all", thanks.
> 2012/10/15 Hristo Venev <mustrumr97 at gmail.com>:
>> Fixed it by using my linux distribution's toolchain but specifying -march=i686
>> Probable reason: some instructions enabled by default by gcc but not enabled at
>> early stages of booting.
> Hm, I suppose that i686 is not (exactly) the same as -march=i386 (?)
> and therefor is not suitable as a generic solution.
>> P.S. I didn't see any patches applied to my gcc which are not about
>> _FORTIFY_SOURCE/relro/gnu hash.

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