[coreboot] Patch merged into coreboot/master: e7d6f02 AMD SB800: Interrupt routine for PCI slots on Persimmon

gerrit at coreboot.org gerrit at coreboot.org
Fri Nov 30 20:05:59 CET 2012


the following patch was just integrated into master:
commit e7d6f02ca4934319b11ad99fdd92c3e4cf2234be
Author: Zheng Bao <fishbaozi at gmail.com>
Date:   Wed Oct 24 11:22:38 2012 +0800

    AMD SB800: Interrupt routine for PCI slots on Persimmon
    
    Set the correct device number in the pcie interrupt routine in ACPI asl.
    The device number is decided by which address pin is connected to IDSEL.
    Table 3-1: IDSEL Generation
    Primary Address AD[15::11] Secondary Address AD[31::16]
    0 0000 0000 0000 0000 0001
    0 0001 0000 0000 0000 0010
    0 0010 0000 0000 0000 0100
    0 0011 0000 0000 0000 1000
    0 0100 0000 0000 0001 0000
    0 0101 0000 0000 0010 0000
    0 0110 0000 0000 0100 0000
    0 0111 0000 0000 1000 0000
    0 1000 0000 0001 0000 0000
    0 1001 0000 0010 0000 0000
    0 1010 0000 0100 0000 0000
    0 1011 0000 1000 0000 0000
    0 1100 0001 0000 0000 0000
    0 1101 0010 0000 0000 0000
    0 1110 0100 0000 0000 0000
    0 1111 1000 0000 0000 0000
    1 xxxx 0000 0000 0000 0000
    On persimmon, PCI slot 0's IDSEL is connected to AD19, so the device number is 3.
    Slot 1's IDSEL is connected to AD20, so the device number is 4.
    
    Change-Id: Ic0fb7ac1c87ec306bf314e4d2b8c2bdc9031081b
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: zbao <fishbaozi at gmail.com>
    Reviewed-on: http://review.coreboot.org/1610
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martin at se-eng.com>
    Reviewed-by: Marc Jones <marcj303 at gmail.com>

Build-Tested: build bot (Jenkins) at Wed Oct 24 04:31:11 2012, giving +1
Reviewed-By: Marc Jones <marcj303 at gmail.com> at Fri Nov 30 20:05:58 2012, giving +2
See http://review.coreboot.org/1610 for details.

-gerrit




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