[coreboot] New patch to review for coreboot: 40ed993 mainboard/siemens/sitemp_g1p1: Fix CMOS checksum algorithm here, too

Nico Huber (nico.huber@secunet.com) gerrit at coreboot.org
Wed Nov 14 10:04:18 CET 2012

Nico Huber (nico.huber at secunet.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1852


commit 40ed9939d626b7f3bae4bae82540fc9a01f64e6a
Author: Nico Huber <nico.huber at secunet.com>
Date:   Tue Nov 13 14:45:38 2012 +0100

    mainboard/siemens/sitemp_g1p1: Fix CMOS checksum algorithm here, too
    Some time ago our CMOS checksum algorithm was changed under the topic:
        Fix our CMOS checksum algorithm so it matches what /dev/nvram expects
    Here is another copy of the algorithm that had to be updated.
    Change-Id: I58659c7b8a89c89c76efdff405ee0620e7302277
    Signed-off-by: Nico Huber <nico.huber at secunet.com>
 src/mainboard/siemens/sitemp_g1p1/romstage.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c
index 0c61e5d..141b0fa 100644
--- a/src/mainboard/siemens/sitemp_g1p1/romstage.c
+++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c
@@ -147,7 +147,7 @@ static inline int cmos_chksum_valid(void) {
-	sum = (sum & 0xffff) ^ 0xffff;
+	sum = (sum & 0xffff);
 	/* Read the stored checksum */
 	outb(LB_CKS_LOC, 0x72);

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