[coreboot] Patch set updated for coreboot: 03dff06 Auto-generate bootblock initialisation
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Wed Nov 14 00:15:07 CET 2012
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/473
-gerrit
commit 03dff0678d147363bfd35dceb2af0342c3dd3048
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Thu Feb 23 14:17:53 2012 +0200
Auto-generate bootblock initialisation
A new init function called from bootblock is declared as:
- unsigned long init_mainboard(int bsp_cpu)
For BSP CPU bootblock calls init_mainboard(true). For AP CPUs bootblock
calls init_mainboard(false). Usually AP CPU has nothing to do here.
By default, build toolchain creates and includes an init_mainboard()
function in file $(objgenerated)/bootblock_devices.h that executes
init functions from any bootblock.c files for all chips listed in
mainboard/devtree.cb.
Alternatively a mainboard/x/x/bootblock.c file is added in the
bootblock build, if a Kconfig option HAS_MAINBOARD_BOOTBLOCK is set.
One should copy the auto-generated init_mainboard() to this file,
and optionally read various bootstrap signals or status bits from
super-io and southbridge component to gain some control over the
selection of romstage to boot via the return value.
Samples of such (yet not implemented) controls for boot behaviour:
- Reset CMOS to defaults on user request (jumper).
- Use fallback prefix after power-button 4s override.
- Refuse boot after intruder detection.
- On remote wakeup, request network boot.
Change-Id: Ib1d101cdd68993530c9c7a653ac000a01de52ac2
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/arch/x86/Kconfig | 7 ++----
src/arch/x86/Makefile.inc | 11 ++++++---
src/arch/x86/include/bootblock_common.h | 18 +--------------
src/arch/x86/init/bootblock_normal.c | 8 +++----
src/arch/x86/init/bootblock_simple.c | 9 ++++----
src/cpu/intel/model_206ax/Kconfig | 4 ----
src/northbridge/amd/agesa/family15tn/bootblock.c | 29 ------------------------
src/northbridge/amd/amdfam10/Kconfig | 4 ----
src/northbridge/amd/amdk8/Kconfig | 4 ----
src/southbridge/amd/agesa/hudson/Kconfig | 5 ----
src/southbridge/amd/amd8111/Kconfig | 4 ----
src/southbridge/amd/cimx/sb700/Kconfig | 3 ---
src/southbridge/amd/cimx/sb800/Kconfig | 3 ---
src/southbridge/amd/cimx/sb900/Kconfig | 4 ----
src/southbridge/amd/sb600/Kconfig | 3 ---
src/southbridge/amd/sb700/Kconfig | 4 ----
src/southbridge/amd/sb800/Kconfig | 5 ----
src/southbridge/broadcom/bcm5785/Kconfig | 4 ----
src/southbridge/intel/bd82x6x/Kconfig | 4 ----
src/southbridge/intel/i82371eb/Kconfig | 5 ----
src/southbridge/intel/i82801gx/Kconfig | 4 ----
src/southbridge/nvidia/ck804/Kconfig | 4 ----
src/southbridge/nvidia/mcp55/Kconfig | 4 ----
src/southbridge/rdc/r8610/Kconfig | 4 ----
src/southbridge/sis/sis966/Kconfig | 4 ----
src/southbridge/via/vt8237r/Kconfig | 4 ----
26 files changed, 20 insertions(+), 142 deletions(-)
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index ec52d0e..7232689 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -70,8 +70,8 @@ config PC80_SYSTEM
bool
default y
-config BOOTBLOCK_NORTHBRIDGE_INIT
- string
+config HAS_MAINBOARD_BOOTBLOCK
+ def_bool n
config HAVE_CMOS_DEFAULT
def_bool n
@@ -80,9 +80,6 @@ config CMOS_DEFAULT_FILE
string
depends on HAVE_CMOS_DEFAULT
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
-
config HAVE_ARCH_MEMSET
bool
default y
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index abc71de..a2b27e9 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -320,11 +320,16 @@ $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(o
@printf " CC $(subst $(obj)/,,$(@))\n"
$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
-$(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
+$(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objgenerated)/bootblock_devices.h $(objutil)/romcc/romcc $(OPTION_TABLE_H)
@printf " ROMCC $(subst $(obj)/,,$(@))\n"
- $(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \
+ $(CC) $(INCLUDES) -I$(@D) -MM -MT$(objgenerated)/bootblock.inc \
$< > $(objgenerated)/bootblock.inc.d
- $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) $< -o $@
+ $(ROMCC) -c -S $(bootblock_romccflags) $(ROMCCFLAGS) -I. $(INCLUDES) -I$(@D) $< -o $@
+
+$(objgenerated)/bootblock_devices.h: $(src)/mainboard/$(MAINBOARDDIR)/devicetree.cb $(objutil)/sconfig/sconfig
+ @printf " SCONFIG $(subst $(src)/,,$(<)) (bootblock)\n"
+ mkdir -p $(@D)
+ $(objutil)/sconfig/sconfig $(MAINBOARDDIR) $(@D) -b $(@F)
$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld
@printf " LINK $(subst $(obj)/,,$(@))\n"
diff --git a/src/arch/x86/include/bootblock_common.h b/src/arch/x86/include/bootblock_common.h
index c9674f4..7761142 100644
--- a/src/arch/x86/include/bootblock_common.h
+++ b/src/arch/x86/include/bootblock_common.h
@@ -1,22 +1,6 @@
#include <cpu/x86/lapic/boot_cpu.c>
-
-#ifdef CONFIG_BOOTBLOCK_CPU_INIT
-#include CONFIG_BOOTBLOCK_CPU_INIT
-#else
-static void bootblock_cpu_init(void) { }
-#endif
-#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
-#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT
-#else
-static void bootblock_northbridge_init(void) { }
-#endif
-#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
-#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT
-#else
-static void bootblock_southbridge_init(void) { }
-#endif
-
#include <arch/cbfs.h>
+#include "bootblock_devices.h"
#if CONFIG_USE_OPTION_TABLE
#include <pc80/mc146818rtc.h>
diff --git a/src/arch/x86/init/bootblock_normal.c b/src/arch/x86/init/bootblock_normal.c
index 19b3d5a..ddfb436 100644
--- a/src/arch/x86/init/bootblock_normal.c
+++ b/src/arch/x86/init/bootblock_normal.c
@@ -9,14 +9,14 @@ static const char *get_fallback(const char *stagelist) {
static void main(unsigned long bist)
{
unsigned long entry;
+ int bsp_cpu = boot_cpu();
int boot_mode;
const char *default_filenames = "normal/romstage\0fallback/romstage";
- if (boot_cpu()) {
- bootblock_northbridge_init();
- bootblock_southbridge_init();
- bootblock_cpu_init();
+ /* Mainboard-specific early init. */
+ init_mainboard(bsp_cpu);
+ if (bsp_cpu) {
#if CONFIG_USE_OPTION_TABLE
sanitize_cmos();
#endif
diff --git a/src/arch/x86/init/bootblock_simple.c b/src/arch/x86/init/bootblock_simple.c
index fd9ba22..7518077 100644
--- a/src/arch/x86/init/bootblock_simple.c
+++ b/src/arch/x86/init/bootblock_simple.c
@@ -2,11 +2,12 @@
static void main(unsigned long bist)
{
- if (boot_cpu()) {
- bootblock_northbridge_init();
- bootblock_southbridge_init();
- bootblock_cpu_init();
+ int bsp_cpu = boot_cpu();
+ /* Mainboard-specific early init. */
+ init_mainboard(bsp_cpu);
+
+ if (bsp_cpu) {
#if CONFIG_USE_OPTION_TABLE
sanitize_cmos();
#endif
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig
index 5b3f893..2bca201 100644
--- a/src/cpu/intel/model_206ax/Kconfig
+++ b/src/cpu/intel/model_206ax/Kconfig
@@ -16,10 +16,6 @@ config CPU_SPECIFIC_OPTIONS
#select AP_IN_SIPI_WAIT
select TSC_SYNC_MFENCE
-config BOOTBLOCK_CPU_INIT
- string
- default "cpu/intel/model_206ax/bootblock.c"
-
config SERIAL_CPU_INIT
bool
default n
diff --git a/src/northbridge/amd/agesa/family15tn/bootblock.c b/src/northbridge/amd/agesa/family15tn/bootblock.c
deleted file mode 100644
index 6cdb2b5..0000000
--- a/src/northbridge/amd/agesa/family15tn/bootblock.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- *****************************************************************************
- *
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- * ***************************************************************************
- *
- */
-
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <device/pci_def.h>
-
-static void bootblock_northbridge_init(void) {
-}
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig
index a14339e..633d378 100644
--- a/src/northbridge/amd/amdfam10/Kconfig
+++ b/src/northbridge/amd/amdfam10/Kconfig
@@ -59,10 +59,6 @@ config MMCONF_BUS_NUMBER
int
default 256
-config BOOTBLOCK_NORTHBRIDGE_INIT
- string
- default "northbridge/amd/amdfam10/bootblock.c"
-
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
bool
default n
diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig
index 9ea5404..ddb2377 100644
--- a/src/northbridge/amd/amdk8/Kconfig
+++ b/src/northbridge/amd/amdk8/Kconfig
@@ -55,10 +55,6 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
-config BOOTBLOCK_NORTHBRIDGE_INIT
- string
- default "northbridge/amd/amdk8/bootblock.c"
-
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
bool
default n
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index 4afe377..09cab50 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -23,11 +23,6 @@ config SOUTHBRIDGE_AMD_AGESA_HUDSON
select HAVE_USBDEBUG
select TINY_BOOTBLOCK
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/agesa/hudson/bootblock.c"
- depends on SOUTHBRIDGE_AMD_AGESA_HUDSON
-
config SOUTHBRIDGE_AMD_HUDSON_SKIP_ISA_DMA_INIT
bool
default n
diff --git a/src/southbridge/amd/amd8111/Kconfig b/src/southbridge/amd/amd8111/Kconfig
index fd244c8..03d0f29 100644
--- a/src/southbridge/amd/amd8111/Kconfig
+++ b/src/southbridge/amd/amd8111/Kconfig
@@ -22,7 +22,3 @@ config SOUTHBRIDGE_AMD_AMD8111
select IOAPIC
select HAVE_HARD_RESET
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/amd8111/bootblock.c"
- depends on SOUTHBRIDGE_AMD_AMD8111
diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig
index f139450..95993cf 100644
--- a/src/southbridge/amd/cimx/sb700/Kconfig
+++ b/src/southbridge/amd/cimx/sb700/Kconfig
@@ -47,9 +47,6 @@ config ACPI_SCI_IRQ
default 0x9
help
Set SCI IRQ to 9.
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/cimx/sb700/bootblock.c"
config REDIRECT_SBCIMX_TRACE_TO_SERIAL
bool "Redirect AMD Southbridge CIMX Trace to serial console"
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index 4ac2094..b45327a 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -24,9 +24,6 @@ config SOUTHBRIDGE_AMD_CIMX_SB800
select AMD_SB_CIMX
if SOUTHBRIDGE_AMD_CIMX_SB800
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/cimx/sb800/bootblock.c"
config ENABLE_IDE_COMBINED_MODE
bool "Enable SATA IDE combined mode"
diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig
index acc369e..6906d31 100755
--- a/src/southbridge/amd/cimx/sb900/Kconfig
+++ b/src/southbridge/amd/cimx/sb900/Kconfig
@@ -49,10 +49,6 @@ config ACPI_SCI_IRQ
help
Set SCI IRQ to 9.
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/cimx/sb900/bootblock.c"
-
config S3_VOLATILE_POS
hex "S3 volatile storage position"
default 0xFFFF0000
diff --git a/src/southbridge/amd/sb600/Kconfig b/src/southbridge/amd/sb600/Kconfig
index 51d8310..98f07db 100644
--- a/src/southbridge/amd/sb600/Kconfig
+++ b/src/southbridge/amd/sb600/Kconfig
@@ -24,9 +24,6 @@ config SOUTHBRIDGE_AMD_SB600
select HAVE_HARD_RESET
if SOUTHBRIDGE_AMD_SB600
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/sb600/bootblock.c"
config EHCI_BAR
hex
diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig
index 924e2df..b4c95c9 100644
--- a/src/southbridge/amd/sb700/Kconfig
+++ b/src/southbridge/amd/sb700/Kconfig
@@ -33,10 +33,6 @@ config SOUTHBRIDGE_AMD_SUBTYPE_SP5100
bool
default n
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/sb700/bootblock.c"
-
config SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT
bool
default n
diff --git a/src/southbridge/amd/sb800/Kconfig b/src/southbridge/amd/sb800/Kconfig
index 592f9a7..5490c56 100644
--- a/src/southbridge/amd/sb800/Kconfig
+++ b/src/southbridge/amd/sb800/Kconfig
@@ -23,11 +23,6 @@ config SOUTHBRIDGE_AMD_SB800
select HAVE_USBDEBUG
select HAVE_HARD_RESET
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/amd/sb800/bootblock.c"
- depends on SOUTHBRIDGE_AMD_SB800
-
config SOUTHBRIDGE_AMD_SB800_SKIP_ISA_DMA_INIT
bool
default n
diff --git a/src/southbridge/broadcom/bcm5785/Kconfig b/src/southbridge/broadcom/bcm5785/Kconfig
index d72afd8..286c19b 100644
--- a/src/southbridge/broadcom/bcm5785/Kconfig
+++ b/src/southbridge/broadcom/bcm5785/Kconfig
@@ -2,7 +2,3 @@ config SOUTHBRIDGE_BROADCOM_BCM5785
bool
select HAVE_HARD_RESET
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/broadcom/bcm5785/bootblock.c"
- depends on SOUTHBRIDGE_BROADCOM_BCM5785
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index e330fb4..3b14deb 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -43,10 +43,6 @@ config EHCI_DEBUG_OFFSET
hex
default 0xa0
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/intel/bd82x6x/bootblock.c"
-
config SERIRQ_CONTINUOUS_MODE
bool
default n
diff --git a/src/southbridge/intel/i82371eb/Kconfig b/src/southbridge/intel/i82371eb/Kconfig
index 7e5109a..a5c5eb8 100644
--- a/src/southbridge/intel/i82371eb/Kconfig
+++ b/src/southbridge/intel/i82371eb/Kconfig
@@ -2,8 +2,3 @@ config SOUTHBRIDGE_INTEL_I82371EB
bool
select HAVE_ACPI_RESUME if HAVE_ACPI_TABLES
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/intel/i82371eb/bootblock.c"
- depends on SOUTHBRIDGE_INTEL_I82371EB
-
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig
index 4937df7..16e7892 100644
--- a/src/southbridge/intel/i82801gx/Kconfig
+++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -38,10 +38,6 @@ config USBDEBUG_DEFAULT_PORT
int
default 1
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/intel/i82801gx/bootblock.c"
-
config HPET_MIN_TICKS
hex
default 0x80
diff --git a/src/southbridge/nvidia/ck804/Kconfig b/src/southbridge/nvidia/ck804/Kconfig
index b6f718e..287dffe 100644
--- a/src/southbridge/nvidia/ck804/Kconfig
+++ b/src/southbridge/nvidia/ck804/Kconfig
@@ -6,10 +6,6 @@ config SOUTHBRIDGE_NVIDIA_CK804
if SOUTHBRIDGE_NVIDIA_CK804
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/nvidia/ck804/bootblock.c"
-
config EHCI_BAR
hex
default 0xfef00000
diff --git a/src/southbridge/nvidia/mcp55/Kconfig b/src/southbridge/nvidia/mcp55/Kconfig
index cd6009d..2c29267 100644
--- a/src/southbridge/nvidia/mcp55/Kconfig
+++ b/src/southbridge/nvidia/mcp55/Kconfig
@@ -6,10 +6,6 @@ config SOUTHBRIDGE_NVIDIA_MCP55
if SOUTHBRIDGE_NVIDIA_MCP55
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/nvidia/mcp55/bootblock.c"
-
config EHCI_BAR
hex
default 0xfef00000
diff --git a/src/southbridge/rdc/r8610/Kconfig b/src/southbridge/rdc/r8610/Kconfig
index e9941f0..b6418eb 100644
--- a/src/southbridge/rdc/r8610/Kconfig
+++ b/src/southbridge/rdc/r8610/Kconfig
@@ -20,7 +20,3 @@
config SOUTHBRIDGE_RDC_R8610
bool
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/rdc/r8610/bootblock.c"
- depends on SOUTHBRIDGE_RDC_R8610
diff --git a/src/southbridge/sis/sis966/Kconfig b/src/southbridge/sis/sis966/Kconfig
index 03dd6b1..4ae16c6 100644
--- a/src/southbridge/sis/sis966/Kconfig
+++ b/src/southbridge/sis/sis966/Kconfig
@@ -4,10 +4,6 @@ config SOUTHBRIDGE_SIS_SIS966
select HAVE_USBDEBUG
select HAVE_HARD_RESET
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/sis/sis966/bootblock.c" if SOUTHBRIDGE_SIS_SIS966
-
config EHCI_BAR
hex
default 0xfef00000 if SOUTHBRIDGE_SIS_SIS966
diff --git a/src/southbridge/via/vt8237r/Kconfig b/src/southbridge/via/vt8237r/Kconfig
index d0a6deb..9aa1b97 100644
--- a/src/southbridge/via/vt8237r/Kconfig
+++ b/src/southbridge/via/vt8237r/Kconfig
@@ -27,7 +27,3 @@ config EPIA_VT8237R_INIT
default n
depends on SOUTHBRIDGE_VIA_VT8237R
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/via/vt8237r/bootblock.c"
- depends on SOUTHBRIDGE_VIA_VT8237R
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