[coreboot] Patch merged into coreboot/master: 23b0053 SPI: Fix and enable Fast Read support

gerrit at coreboot.org gerrit at coreboot.org
Mon Nov 12 17:09:26 CET 2012

the following patch was just integrated into master:
commit 23b0053586974e0db70349a272d8cc09167fb4cb
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Wed Oct 10 14:21:23 2012 -0700

    SPI: Fix and enable Fast Read support
    - Fix handling of 5-byte Fast Read command in the ICH SPI
    driver.  This fix is ported from the U-boot driver.
    - Allow CONFIG_SPI_FLASH_NO_FAST_READ to be overridden by
    defining a name for the bool in Kconfig and removing the
    forced select in southbridge config
    - Fix use of CONFIG_SPI_FLASH_NO_FAST_READ in SPI drivers
    to use #if instead of #ifdef
    - Relocate flash functions in SMM so they are usable.
    This really only needs to happen for read function pointer
    since it uses a global function rather than a static one from
    the chip, but it is good to ensure the rest are set up
    correctly as well.
    Change-Id: Ic1bb0764cb111f96dd8a389d83b39fe8f5e72fbd
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: http://review.coreboot.org/1775
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>

Build-Tested: build bot (Jenkins) at Mon Nov 12 08:37:46 2012, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Mon Nov 12 16:40:42 2012, giving +2
See http://review.coreboot.org/1775 for details.


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