[coreboot] Patch set updated for coreboot: cd41b97 ivybridge: Catch unknown CPU revisions

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1783

-gerrit

commit cd41b970deb6079bdc3d74bc4e5af1dfa0fe737b
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Mon Oct 15 13:47:04 2012 -0700

    ivybridge: Catch unknown CPU revisions
    
    Adding an entry for 0x306a0 will make sure that all
    CPUs with CPUIDs 0x306aX will execute the driver (analog to
    Sandybridge behavior)
    
    Change-Id: I0353f3a48ecfd41274fdf6ee302c7d34482f1b5b
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
 src/cpu/intel/model_206ax/model_206ax_init.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index 9676ad1..f7a5c09 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -556,6 +556,7 @@ static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, 0x206a0 }, /* Intel Sandybridge */
 	{ X86_VENDOR_INTEL, 0x206a6 }, /* Intel Sandybridge D1 */
 	{ X86_VENDOR_INTEL, 0x206a7 }, /* Intel Sandybridge D2/J1 */
+	{ X86_VENDOR_INTEL, 0x306a0 }, /* Intel IvyBridge */
 	{ X86_VENDOR_INTEL, 0x306a2 }, /* Intel IvyBridge */
 	{ X86_VENDOR_INTEL, 0x306a4 }, /* Intel IvyBridge */
 	{ X86_VENDOR_INTEL, 0x306a5 }, /* Intel IvyBridge */