[coreboot] Patch merged into coreboot/master: fc1b9ee rtc: force mc146818 register D to a correct value
gerrit at coreboot.org
gerrit at coreboot.org
Wed Nov 7 03:57:48 CET 2012
the following patch was just integrated into master:
commit fc1b9ee4aa19e698b07aaa050949b791aa119847
Author: Vincent Palatin <vpalatin at chromium.org>
Date: Tue Aug 7 16:05:14 2012 -0700
rtc: force mc146818 register D to a correct value
On Panther Point PCH (and maybe cougar point), when some of the register
D reserved bits are set, the RTC starts misbehaving (e.g. incrementing
the year byte every second).
There are probably undocumented features implemented behind those bits.
Let's reset register D to a known state to ensure we get the expected
RTC behavior.
Change-Id: I7e2c2a2c6130a974bccb3d760b41eaa579a58b67
Signed-off-by: Vincent Palatin <vpalatin at chromium.org>
Reviewed-on: http://review.coreboot.org/1695
Reviewed-by: Marc Jones <marcj303 at gmail.com>
Tested-by: build bot (Jenkins)
Build-Tested: build bot (Jenkins) at Wed Nov 7 03:43:03 2012, giving +1
See http://review.coreboot.org/1695 for details.
-gerrit
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