[coreboot] Patch merged into coreboot/master: fa678bb AMD agesa family15: PCI domain should scan bus from 0x18.0

gerrit at coreboot.org gerrit at coreboot.org
Wed Nov 7 02:03:07 CET 2012

the following patch was just integrated into master:
commit fa678bb87f2137d653dfd126da3d47902a048083
Author: Siyuan Wang <wangsiyuanbuaa at gmail.com>
Date:   Sun Oct 28 18:06:40 2012 +0800

    AMD agesa family15: PCI domain should scan bus from 0x18.0
    There are four mainboards using agesa family15 code:
    Supermicro h8scm and h8qgi, Tyan s8226 and AMD dinar.
    All of these boards' PCI domain starts from 0x18.0. Take h8scm as
    an example, PCI devices from 0.0 to 0x14.5 is under 0x18.0.
    Now, the PCI domain's scan bus function stats from 0.0. This would
    result to the PCI devices be scanned twice. Because when the function
    run to device 18.0, it would scan from 0.0 again.
    This issue would result to 2 problems:
    1) PCI device may be assigned two different PCI address.
       If this happenned on VGA device, coreboot maybe not load
       vga bios correctly.
    2) coreboot initializes rd890's IO APIC twice.
    So this patch scans from 0x18.0 and could resolve the problems above.
    Change-Id: I90fbdf695413fd24c7a5e3e9b426dc7ca6e128b1
    Signed-off-by: Siyuan Wang <SiYuan.Wang at amd.com>
    Signed-off-by: Siyuan Wang <wangsiyuanbuaa at gmail.com>
    Reviewed-on: http://review.coreboot.org/1639
    Tested-by: build bot (Jenkins)
    Reviewed-by: Marc Jones <marcj303 at gmail.com>

Build-Tested: build bot (Jenkins) at Tue Nov  6 13:07:57 2012, giving +1
Reviewed-By: Marc Jones <marcj303 at gmail.com> at Wed Nov  7 02:02:57 2012, giving +2
See http://review.coreboot.org/1639 for details.


More information about the coreboot mailing list