[coreboot] New patch to review for coreboot: e3051b5 SPI: opmenu special case for WREN as atomic prefix

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Tue Nov 6 23:51:57 CET 2012


Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1710

-gerrit

commit e3051b5464e3fa349fad43d319f07bbe6a31479f
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Aug 27 11:10:43 2012 -0700

    SPI: opmenu special case for WREN as atomic prefix
    
    The code that attempts to use the opmenu needs to have a special
    case for write enable now that it is handled as an atomic prefix
    and not as a standalone opcode.
    
    To test, ensure that runtime SPI write via ELOG is successful by
    checking the event log for a kernel shutdown reason code:
    
    5 | 2012-08-27 11:09:48 | Kernel Event | Clean Shutdown
    6 | 2012-08-27 11:09:50 | System boot | 26
    7 | 2012-08-27 11:09:50 | System Reset
    
    Change-Id: I527638ef3e2a5ab100192c5be6e6b3b40916295a
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/include/spi.h                   | 3 +++
 src/southbridge/intel/bd82x6x/spi.c | 6 +++++-
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/include/spi.h b/src/include/spi.h
index bee851e..7d195d0 100644
--- a/src/include/spi.h
+++ b/src/include/spi.h
@@ -44,6 +44,9 @@
 #define SPI_XFER_BEGIN	0x01			/* Assert CS before transfer */
 #define SPI_XFER_END	0x02			/* Deassert CS after transfer */
 
+/* SPI opcodes */
+#define SPI_OPCODE_WREN 0x06
+
 /*-----------------------------------------------------------------------
  * Representation of a SPI slave, i.e. what we're communicating with.
  *
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c
index 5903fd8..2e88932 100644
--- a/src/southbridge/intel/bd82x6x/spi.c
+++ b/src/southbridge/intel/bd82x6x/spi.c
@@ -505,6 +505,10 @@ static int spi_setup_opcode(spi_transaction *trans)
 		uint8_t optype;
 		uint16_t opcode_index;
 
+		/* Write Enable is handled as atomic prefix */
+		if (trans->opcode == SPI_OPCODE_WREN)
+			return 0;
+
 		read_reg(cntlr.opmenu, opmenu, sizeof(opmenu));
 		for (opcode_index = 0; opcode_index < cntlr.menubytes;
 				opcode_index++) {
@@ -623,7 +627,7 @@ int spi_xfer(struct spi_slave *slave, const void *dout,
 	if ((with_address = spi_setup_offset(&trans)) < 0)
 		return -1;
 
-	if (!ichspi_lock && trans.opcode == 0x06) {
+	if (!ichspi_lock && trans.opcode == SPI_OPCODE_WREN) {
 		/*
 		 * Treat Write Enable as Atomic Pre-Op if possible
 		 * in order to prevent the Management Engine from




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