[coreboot] New patch to review for coreboot: ea39273 Clean up Emerald Lake 2 mainboard directory

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Tue May 1 01:49:58 CEST 2012


Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/967

-gerrit

commit ea39273f80f64da5992b79e86ec950d6e0a3b420
Author: Gabe Black <gabeblack at google.com>
Date:   Fri Mar 30 14:33:02 2012 -0700

    Clean up Emerald Lake 2 mainboard directory
    
    Change-Id: I4a64a56dda22050a31232807096e15565a665377
    Signed-off-by: Gabe Black <gabeblack at google.com>
---
 src/mainboard/intel/emeraldlake2/gpio.h     |    6 +++---
 src/mainboard/intel/emeraldlake2/romstage.c |    2 +-
 src/mainboard/intel/emeraldlake2/thermal.h  |    4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/mainboard/intel/emeraldlake2/gpio.h b/src/mainboard/intel/emeraldlake2/gpio.h
index c458c83..05b9164 100644
--- a/src/mainboard/intel/emeraldlake2/gpio.h
+++ b/src/mainboard/intel/emeraldlake2/gpio.h
@@ -17,8 +17,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef LINK_GPIO_H
-#define LINK_GPIO_H
+#ifndef EMERALDLAKE2_GPIO_H
+#define EMERALDLAKE2_GPIO_H
 
 #include "southbridge/intel/bd82x6x/gpio.h"
 
@@ -84,7 +84,7 @@ const struct pch_gpio_set3 pch_gpio_set3_direction = {
 const struct pch_gpio_set3 pch_gpio_set3_level = {
 };
 
-const struct pch_gpio_map link_gpio_map = {
+const struct pch_gpio_map emeraldlake2_gpio_map = {
 	.set1 = {
 		.mode      = &pch_gpio_set1_mode,
 		.direction = &pch_gpio_set1_direction,
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index 23d1d6b..753d1d7 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -242,7 +242,7 @@ void main(unsigned long bist)
 	/* Enable GPIOs */
 	pci_write_config32(PCH_LPC_DEV, GPIO_BASE, DEFAULT_GPIOBASE|1);
 	pci_write_config8(PCH_LPC_DEV, GPIO_CNTL, 0x10);
-	setup_pch_gpios(&link_gpio_map);
+	setup_pch_gpios(&emeraldlake2_gpio_map);
 	setup_sio_gpios();
 
 	/* Early SuperIO setup */
diff --git a/src/mainboard/intel/emeraldlake2/thermal.h b/src/mainboard/intel/emeraldlake2/thermal.h
index deb40c2..883849d 100644
--- a/src/mainboard/intel/emeraldlake2/thermal.h
+++ b/src/mainboard/intel/emeraldlake2/thermal.h
@@ -17,8 +17,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef LINK_THERMAL_H
-#define LINK_THERMAL_H
+#ifndef EMERALDLAKE2_THERMAL_H
+#define EMERALDLAKE2_THERMAL_H
 
 /* Fan is OFF */
 #define FAN4_THRESHOLD_OFF	0




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