[coreboot] New patch to review for coreboot: c81993b Makefile: rename romstage linking filenames
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Mon Mar 26 19:22:42 CEST 2012
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/812
-gerrit
commit c81993b926372a1bcddc3c6c1666e789868fdd5a
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Mon Mar 26 19:03:44 2012 +0300
Makefile: rename romstage linking filenames
$(obj)/location.txt -> $(obj)/romstage/base_xip.txt
$(obj)/romstage/link1st.ld -> $(obj)/romstage/link_null.ld
$(obj)/romstage/link2nd.ld -> $(obj)/romstage/link_xip.ld
Change-Id: I15cf29b13a846729f19ecefb21819c4e66681155
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/arch/x86/Makefile.inc | 20 ++++++++++----------
1 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index f131af9..00e7b86 100755
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -274,7 +274,7 @@ $(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL)
@printf " CBFS $(subst $(obj)/,,$(@))\n"
cp $(obj)/coreboot.pre1 $@.tmp
$(CBFSTOOL) $@.tmp add-stage $(obj)/romstage.elf \
- $(CONFIG_CBFS_PREFIX)/romstage x $(shell cat $(obj)/location.txt)
+ $(CONFIG_CBFS_PREFIX)/romstage x $(shell cat $(obj)/romstage/base_xip.txt)
mv $@.tmp $@
#######################################################################
@@ -344,21 +344,21 @@ $(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootbl
#######################################################################
# Build the romstage
-$(obj)/romstage.bin: $$(romstage-objs) $(obj)/romstage/link1st.ld
+$(obj)/romstage.bin: $$(romstage-objs) $(obj)/romstage/link_null.ld
@printf " LINK $(subst $(obj)/,,$(@))\n"
- $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/link1st.ld $(romstage-objs)
+ $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/link_null.ld $(romstage-objs)
$(OBJCOPY) -O binary $(obj)/romstage.elf $@
-$(obj)/coreboot.romstage: $$(romstage-objs) $(obj)/romstage/link2nd.ld
+$(obj)/coreboot.romstage: $$(romstage-objs) $(obj)/romstage/link_xip.ld
@printf " LINK $(subst $(obj)/,,$(@))\n"
- $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/link2nd.ld $(romstage-objs)
+ $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/link_xip.ld $(romstage-objs)
$(NM) -n $(obj)/romstage.elf | sort > $(obj)/romstage.map
$(OBJCOPY) --only-keep-debug $(obj)/romstage.elf $(obj)/romstage.debug
$(OBJCOPY) --strip-debug $(obj)/romstage.elf
$(OBJCOPY) --add-gnu-debuglink=$(obj)/romstage.debug $(obj)/romstage.elf
$(OBJCOPY) -O binary $(obj)/romstage.elf $@
-$(obj)/romstage/link1st.ld: $$(ldscripts) $(obj)/ldoptions
+$(obj)/romstage/link_null.ld: $$(ldscripts) $(obj)/ldoptions
@printf " GEN $(subst $(obj)/,,$(@))\n"
mkdir -p $(obj)/romstage
rm -f $@
@@ -366,14 +366,14 @@ $(obj)/romstage/link1st.ld: $$(ldscripts) $(obj)/ldoptions
printf '$(foreach ldscript,ldoptions $(ldscripts),INCLUDE "$(ldscript:$(obj)/%=%)"\n)' >> $@.tmp
mv $@.tmp $@
-$(obj)/romstage/link2nd.ld: $(obj)/romstage/link1st.ld $(obj)/location.txt
+$(obj)/romstage/link_xip.ld: $(obj)/romstage/link_null.ld $(obj)/romstage/base_xip.txt
@printf " GEN $(subst $(obj)/,,$(@))\n"
rm -f $@
- sed -e 's/^/ROMSTAGE_BASE = /g' -e 's/$$/;/g' $(obj)/location.txt > $@.tmp
- sed -e '/ROMSTAGE_BASE/d' $(obj)/romstage/link1st.ld >> $@.tmp
+ sed -e 's/^/ROMSTAGE_BASE = /g' -e 's/$$/;/g' $(obj)/romstage/base_xip.txt > $@.tmp
+ sed -e '/ROMSTAGE_BASE/d' $(obj)/romstage/link_null.ld >> $@.tmp
mv $@.tmp $@
-$(obj)/location.txt: $(obj)/coreboot.pre1 $(obj)/romstage.bin
+$(obj)/romstage/base_xip.txt: $(obj)/coreboot.pre1 $(obj)/romstage.bin
rm -f $@
$(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $@.tmp \
|| { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; }
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