[coreboot] Patch set updated for coreboot: 2ce20b6 Fix AMD Fam14 cbmen allocation
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Fri Mar 16 18:32:46 CET 2012
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/790
-gerrit
commit 2ce20b6a8ee97d62013a5c7bde3f237ef3614343
Author: Marc Jones <marc.jones at se-eng.com>
Date: Thu Mar 15 13:21:41 2012 -0600
Fix AMD Fam14 cbmen allocation
The Fam14 northbridge.c had hardcoded the cbmem size. It should use
in cbmem.h instead.
Change-Id: I910329fc98a4cf04dc81ef66f3aa05a1916f5b1d
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
---
src/northbridge/amd/agesa/family14/northbridge.c | 25 ++++++++--------------
1 files changed, 9 insertions(+), 16 deletions(-)
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 92ca0ff..15efe12 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -28,6 +28,7 @@
#include <string.h>
#include <bitops.h>
#include <cpu/cpu.h>
+#include <cbmem.h>
#include <cpu/x86/lapic.h>
@@ -325,11 +326,6 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
}
#endif
-#if CONFIG_WRITE_HIGH_TABLES==1
-#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
-extern uint64_t high_tables_base, high_tables_size;
-#endif
-
#if CONFIG_GFXUMA == 1
extern uint64_t uma_memory_base, uma_memory_size;
@@ -693,16 +689,13 @@ static void domain_set_resources(device_t dev)
if (high_tables_base == 0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA == 1
- high_tables_base =
- uma_memory_base -
- (HIGH_TABLES_SIZE * 1024);
+ high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
- high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024;
+ high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
#endif
- high_tables_size = HIGH_TABLES_SIZE * 1024;
- printk(BIOS_DEBUG,
- " split: %dK table at =%08llx\n",
- HIGH_TABLES_SIZE, high_tables_base);
+ high_tables_size = HIGH_MEMORY_SIZE;
+ printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
+ (u32)(high_tables_size / 1024), high_tables_base);
}
#endif
}
@@ -726,12 +719,12 @@ static void domain_set_resources(device_t dev)
if (high_tables_base == 0) {
/* Leave some space for ACPI, PIRQ and MP tables */
#if CONFIG_GFXUMA == 1
- high_tables_base = uma_memory_base - (HIGH_TABLES_SIZE * 1024);
+ high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, " adsr - uma_memory_base = %llx.\n", uma_memory_base);
#else
- high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
#endif
- high_tables_size = HIGH_TABLES_SIZE * 1024;
+ high_tables_size = HIGH_MEMORY_SIZE;
}
#endif
}
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