[coreboot] New patch to review for coreboot: e3dee5e PCI(E) slots on Persimmon

Paul Menzel paulepanter at users.sourceforge.net
Fri Jun 8 09:02:22 CEST 2012

Dear Zheng,

Am Freitag, den 08.06.2012, 05:16 +0200 schrieb Zheng Bao:
> Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1098
> -gerrit
> commit e3dee5ecf44af9fce33deb44d6e1fa6a671587a6
> Author: zbao <fishbaozi at gmail.com>

please correct the author name to your real name.

    git config user.name Zheng Bao

Also your other commits all use your AMD address.

> Date:   Fri Jun 8 12:46:36 2012 +0800
>     PCI(E) slots on Persimmon

That is not a good summary because you do not write, what you are doing.

>     (routine.asl):Set the correct device number in the pcie interrupt routine in ACPI asl.
>     (devicetree.cb): Enable the PCIE bridge which is connected to the PCIE slot.

I prefer three patches. Could you please split this patch up? That would
be awesome.

1. Persimmon: routine.asl: Set correct device number in PCIE interrupt routine
2. Persimmon: devicetree.cb: change IDs to names
3. Persimmon: devicetree.cb: enable the PCIE bridge (and refer to [1] as
this is the fix for this problem?)

If it is Andy’s Tested-bys would also be appreciated.

>     Change-Id: I1b3fb59990e06d7bc7cf19639f2b93dbb7bf9b3e
>     Signed-off-by: Zheng Bao <zheng.bao at amd.com>
>     Signed-off-by: zbao <fishbaozi at gmail.com>
> ---
>  src/mainboard/amd/persimmon/acpi/routing.asl |   24 ++++++++++++------------
>  src/mainboard/amd/persimmon/devicetree.cb    |   10 +++++-----
>  2 files changed, 17 insertions(+), 17 deletions(-)




[1] http://www.coreboot.org/pipermail/coreboot/2012-June/070199.html
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