[coreboot] Patch merged into coreboot/master: 9befba2 Add BAR address debug information to Oxford PCIe serial driver

gerrit at coreboot.org gerrit at coreboot.org
Tue Jul 24 22:48:09 CEST 2012


the following patch was just integrated into master:
commit 9befba2ae7ce00e230d563622d9460be635247b3
Author: Marc Jones <marc.jones at se-eng.com>
Date:   Mon Jul 2 22:31:22 2012 -0600

    Add BAR address debug information to Oxford PCIe serial driver
    
    The Oxford PCIE Serial card has a hardcoded address at setup,
    which may be moved during PCI Init. The driver re-initializes
    after PCI init. Add a debug print for the new BAR address.
    
    Initializing Oxford OXPCIe952
    OXPCIe952: Class=70002 Revision ID=0
    OXPCIe952: 2 UARTs detected.
    OXPCIe952: Uart Bar: 0xe0800000
    
    Change-Id: I1858d3eba09749cba3c3869060d00e621dca112a
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>

Build-Tested: build bot (Jenkins) at Tue Jul 24 22:10:21 2012, giving +1
Reviewed-By: Ronald G. Minnich <rminnich at gmail.com> at Tue Jul 24 22:47:52 2012, giving +2
See http://review.coreboot.org/1327 for details.

-gerrit




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