[coreboot] New patch to review for coreboot: f207abb bd82x6x: Drop unneeded pci_dev_t
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Tue Jul 24 01:42:32 CEST 2012
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1331
-gerrit
commit f207abb3c727ebb80f0398d3a44e5defe93fed99
Author: Stefan Reinauer <reinauer at chromium.org>
Date: Tue Jul 10 13:26:59 2012 -0700
bd82x6x: Drop unneeded pci_dev_t
This was introduced when porting the SPI driver over from u-boot but it
is not needed. Hence drop the extra typedef and use device_t instead.
Change-Id: I3ab797a8e482d1c9aa1d004e488e99aeaffcdd8b
Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
src/southbridge/intel/bd82x6x/spi.c | 4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/src/southbridge/intel/bd82x6x/spi.c b/src/southbridge/intel/bd82x6x/spi.c
index 6b39571..5903fd8 100644
--- a/src/southbridge/intel/bd82x6x/spi.c
+++ b/src/southbridge/intel/bd82x6x/spi.c
@@ -36,7 +36,6 @@
#ifdef __SMM__
#include <arch/romcc_io.h>
#include <northbridge/intel/sandybridge/pcie_config.c>
-typedef device_t pci_dev_t;
#define pci_read_config_byte(dev, reg, targ)\
*(targ) = pcie_read_config8(dev, reg)
#define pci_read_config_word(dev, reg, targ)\
@@ -52,7 +51,6 @@ typedef device_t pci_dev_t;
#else /* !__SMM__ */
#include <device/device.h>
#include <device/pci.h>
-typedef device_t pci_dev_t;
#define pci_read_config_byte(dev, reg, targ)\
*(targ) = pci_read_config8(dev, reg)
#define pci_read_config_word(dev, reg, targ)\
@@ -331,7 +329,7 @@ void spi_init(void)
uint8_t *rcrb; /* Root Complex Register Block */
uint32_t rcba; /* Root Complex Base Address */
uint8_t bios_cntl;
- pci_dev_t dev;
+ device_t dev;
uint32_t ids;
uint16_t vendor_id, device_id;
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