[coreboot] New patch to review for coreboot: a68e3d1 Fix ME hash functions on Panther Point/Cougar Point

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1279

-gerrit

commit a68e3d1880817916d1f58413340d672cf8341dd9
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Mon Jun 11 14:13:09 2012 -0700

    Fix ME hash functions on Panther Point/Cougar Point
    
    - On Cougar Point there may have been stack corruption during the
      ME hash verification
    - On Panther Point the ME firmware hash was not passed on to the
      OS
    
    Change-Id: I73fc10db63ecff939833fb856a6da1e394155043
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
 src/southbridge/intel/bd82x6x/me.c     |    2 +-
 src/southbridge/intel/bd82x6x/me_8.x.c |   16 +++++++++-------
 2 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index a1ae06d..1b7b262 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -621,7 +621,7 @@ static int intel_mei_setup(device_t dev)
 static int intel_me_extend_valid(device_t dev)
 {
 	struct me_heres status;
-	u32 extend[] = {0};
+	u32 extend[8] = {0};
 	int i, count = 0;
 
 	pci_read_dword_ptr(dev, &status, PCI_ME_HERES);
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index 1bb2ce3..c7a69fe 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -49,6 +49,7 @@
 
 #if CONFIG_CHROMEOS
 #include <vendorcode/google/chromeos/chromeos.h>
+#include <vendorcode/google/chromeos/gnvs.h>
 #endif
 
 #ifndef __SMM__
@@ -622,7 +623,7 @@ static int intel_mei_setup(device_t dev)
 static int intel_me_extend_valid(device_t dev)
 {
 	struct me_heres status;
-	u32 extend;
+	u32 extend[8] = {0};
 	int i, count = 0;
 
 	pci_read_dword_ptr(dev, &status, PCI_ME_HERES);
@@ -651,16 +652,17 @@ static int intel_me_extend_valid(device_t dev)
 		return -1;
 	}
 
-	/*
-	 * TODO(dlaurie) Verify the hash against a saved good value.
-	 */
-
 	for (i = 0; i < count; ++i) {
-		extend = pci_read_config32(dev, PCI_ME_HER(i));
-		printk(BIOS_DEBUG, "%08x", extend);
+		extend[i] = pci_read_config32(dev, PCI_ME_HER(i));
+		printk(BIOS_DEBUG, "%08x", extend[i]);
 	}
 	printk(BIOS_DEBUG, "\n");
 
+#if CONFIG_CHROMEOS
+	/* Save hash in NVS for the OS to verify */
+	chromeos_set_me_hash(extend, count);
+#endif
+
 	return 0;
 }