[coreboot] Patch set updated for coreboot: 85fd89c buildsystem: Make CPU microcode updating more configurable
Alexandru Gagniuc (mr.nuke.me@gmail.com)
gerrit at coreboot.org
Fri Jul 20 08:25:21 CEST 2012
Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1245
-gerrit
commit 85fd89c0747298d1dc3bdea0ee6f22f215762610
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date: Fri Jul 20 00:11:21 2012 -0500
buildsystem: Make CPU microcode updating more configurable
This commit has two main parts:
1) Move UPDATE_CPU_MICROCODE to src/cpu/Kconfig to make it a more
"global" option, and make it depend on
RESPECT_UPDATE_CPU_MICROCODE_OPTION
Having this option hidded in AMD Fam 10h Kconfig made it virtually
invisible to devs working on other CPUs. Having this as a global
option, should provide an incentive for people to work on
configurable microcode updates.
2) Added option to the build system to include a microcode file in CBFS.
The option will only be visible if the CPU's Kconfig selects
CPU_MICROCODE_FROM_CBFS, basically telling the build system that the
CPU initialization routines are capable of finding and applying
microcode updates from CBFS.
If CPU_MICROCODE_FROM_CBFS is selected, the user is presented with two
options:
- Include microcode in CBFS from an external file
- Don't include any microcode in CBFS
You might also have noticed a commented-out option in Kconfig:
CPU_MICROCODE_CBFS_GENERATE
The idea behind this is to take a C array, compile it, and generate a
microcode file automatically. This means the user won't have to fiddle
with microcode files, which might be next to impossible to obtain.
Since this option requires more intricate modifications to the build
system, it is better to implement it in a future patch.
I am leaving this commented-out option to communicate intent and provide
an incentive to implement it.
Change-Id: I38d0c9851691aa112e93031860e94895857ebb76
Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
src/arch/x86/Makefile.inc | 7 ++++
src/cpu/Kconfig | 76 +++++++++++++++++++++++++++++++++++++++
src/cpu/amd/model_10xxx/Kconfig | 33 +----------------
3 files changed, 84 insertions(+), 32 deletions(-)
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index f498831..a215a7b 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -49,6 +49,9 @@ endif
ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
COREBOOT_ROM_DEPENDENCIES+=$(objcbfs)/coreboot_ap.elf
endif
+ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL),y)
+COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_CPU_MICROCODE_FILE)
+endif
extract_nth=$(word $(1), $(subst |, ,$(2)))
@@ -100,6 +103,10 @@ ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y)
sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \
$(CBFSTOOL) $@.tmp add $(obj)/config.tmp config raw; rm -f $(obj)/config.tmp ; fi
endif
+ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL),y)
+ @printf " CPU uCode cpu_microcode\n"
+ $(CBFSTOOL) $@.tmp add $(CONFIG_CPU_MICROCODE_FILE) cpu_microcode microcode
+endif
mv $@.tmp $@
@printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n"
$(CBFSTOOL) $@ print
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index 85e83d4..849b6f3 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -62,3 +62,79 @@ config SSE2
with more efficient code if SSE2 instructions are available.
endif # ARCH_X86
+
+config CPU_MICROCODE_FROM_CBFS
+ bool
+ default n
+
+choice
+ prompt "Include CPU microcode in CBFS"
+ default CPU_MICROCODE_CBFS_NONE
+ depends on EXPERT && CPU_MICROCODE_FROM_CBFS
+
+#config CPU_MICROCODE_CBFS_GENERATE
+# bool "Generate from tree"
+
+config CPU_MICROCODE_CBFS_EXTERNAL
+ depends on CPU_MICROCODE_FROM_CBFS
+ bool "Include external microcode file"
+ help
+ Select this option if you want to include an external file containing
+ the CPU microcode. This will be included as a separate file in CBFS.
+ This option is only available for CPUs where loading microcode from
+ CBFS is implemented.
+
+config CPU_MICROCODE_CBFS_NONE
+ bool "None"
+ help
+ Select this option if you do not want CPU microcode included in CBFS.
+ Note that for some CPUs, the microcode is hard-coded into the source
+ tree and is not loaded from CBFS. In this case, microcode will still
+ be updated.
+
+endchoice
+
+config CPU_MICROCODE_FILE
+ string "Path and filename of CPU microcode"
+ depends on CPU_MICROCODE_CBFS_EXTERNAL
+ default "microcode.bin"
+ help
+ The path and filename of the file containing the CPU microcode.
+
+
+# The following option lets us know that the CPU initialization code will check
+# for UPDATE_CPU_MICROCODE, and will not include any microcode updates in the
+# image if it detects this option.
+# This must only be selected by CPUs whose microcode update has been adjusted
+# to respect UPDATE_CPU_MICROCODE option.
+config RESPECTS_UPDATE_CPU_MICROCODE_OPTION
+ bool
+ default n
+
+config UPDATE_CPU_MICROCODE
+ bool "Update CPU microcode"
+ default y
+ depends on EXPERT && RESPECTS_UPDATE_CPU_MICROCODE_OPTION
+ help
+ Select this to apply patches to the CPU microcode provided by the
+ vendor (without source), and distributed with coreboot, to address
+ issues in the CPU post production.
+
+ Microcode updates distributed with coreboot are not necessarily the
+ latest version available. Updates are only applied if they are newer
+ than the microcode already in the CPU.
+
+ Unselect this to let CPUs run with microcode as shipped from factory.
+ No binary microcode patches will be included in the coreboot image in
+ that case, which can help with creating an image for which complete
+ source code is available, which in turn might simplify license
+ compliance.
+
+ Microcode updates intend to solve issues that have been discovered
+ after CPU production. The common case is that systems work as intended
+ with updated microcode, but we have also seen cases where issues were
+ solved by not applying the microcode updates.
+
+ Note that some operating system include these same microcode patches,
+ so you may need to also disable microcode updates in your operating
+ system in order for this option to matter.
diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index 221d044..64ac850 100644
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -3,6 +3,7 @@ config CPU_AMD_MODEL_10XXX
select SSE
select SSE2
select MMCONF_SUPPORT_DEFAULT
+ select RESPECTS_UPDATE_CPU_MICROCODE_OPTION
if CPU_AMD_MODEL_10XXX
config CPU_ADDR_BITS
@@ -51,36 +52,4 @@ config SET_FIDVID_CORE_RANGE
endif # SET_FIDVID
-config UPDATE_CPU_MICROCODE
- bool
- default y
-
-config UPDATE_CPU_MICROCODE
- bool "Update CPU microcode"
- default y
- depends on EXPERT && CPU_AMD_MODEL_10XXX
- help
- Select this to apply patches to the CPU microcode provided by
- AMD without source, and distributed with coreboot, to address
- issues in the CPU post production.
-
- Microcode updates distributed with coreboot are not necessarily
- the latest version available from AMD. Updates are only applied
- if they are newer than the microcode already in your CPU.
-
- Unselect this to let Fam10h CPUs run with microcode as shipped
- from factory. No binary microcode patches will be included in the
- coreboot image in that case, which can help with creating an image
- for which complete source code is available, which in turn might
- simplify license compliance.
-
- Microcode updates intend to solve issues that have been discovered
- after CPU production. The common case is that systems work as
- intended with updated microcode, but we have also seen cases where
- issues were solved by not applying the microcode updates.
-
- Note that some operating system include these same microcode
- patches, so you may need to also disable microcode updates in
- your operating system in order for this option to matter.
-
endif # CPU_AMD_MODEL_10XXX
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