[coreboot] New patch to review for coreboot: 0b8aeb8 Intel SCH northbridge: fix resource index
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Wed Jul 18 10:35:35 CEST 2012
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1237
-gerrit
commit 0b8aeb87aab981bebe9e9d0d45d8908aee9b1c2b
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Wed Jul 18 10:05:01 2012 +0300
Intel SCH northbridge: fix resource index
Change-Id: If131ac9df89080faccd8ed952d6fc019483b5b2e
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/northbridge/intel/sch/northbridge.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index 047d7da..1e1e32c 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -87,7 +87,7 @@ static void add_fixed_resources(struct device *dev, int index)
if (get_pcie_bar(&pcie_config_base, &pcie_config_size)) {
printk(BIOS_DEBUG, "Adding PCIe config bar\n");
- resource = new_resource(dev, index + 1);
+ resource = new_resource(dev, index++);
resource->base = (resource_t) pcie_config_base;
resource->size = (resource_t) pcie_config_size;
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
@@ -95,7 +95,7 @@ static void add_fixed_resources(struct device *dev, int index)
}
printk(BIOS_DEBUG, "Adding CMC shadow area\n");
- resource = new_resource(dev, index + 1);
+ resource = new_resource(dev, index++);
resource->base = (resource_t) CMC_SHADOW;
resource->size = (resource_t) (64 * 1024);
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
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