[coreboot] New patch to review for coreboot: 763eae2 IEI PM-LX-800-R11: Removed Core/GLIU Kconfig options

[Ricardo Martins (rasmartins@gmail.com)]

Ricardo Martins (rasmartins at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1185

-gerrit

commit 763eae221a6037f67773080eefeea9327cfea9c9
Author: Ricardo Martins <rasmartins at gmail.com>
Date:   Sat Jul 7 14:33:18 2012 +0100

    IEI PM-LX-800-R11: Removed Core/GLIU Kconfig options
    
    Configuring the Core/GLIU frequencies in the Kconfig file was deemed a
    bad solution. This change hard-codes safe values and removes the
    Kconfig options.
    
    Change-Id: I952ef0c3955e87ad1f113e14b4649578ba32f476
    Signed-off-by: Ricardo Martins <rasmartins at gmail.com>
---
 src/mainboard/iei/pm-lx-800-r11/Kconfig    |   15 ---------------
 src/mainboard/iei/pm-lx-800-r11/romstage.c |   11 ++---------
 2 files changed, 2 insertions(+), 24 deletions(-)

diff --git a/src/mainboard/iei/pm-lx-800-r11/Kconfig b/src/mainboard/iei/pm-lx-800-r11/Kconfig
index a897106..d3b97b8 100644
--- a/src/mainboard/iei/pm-lx-800-r11/Kconfig
+++ b/src/mainboard/iei/pm-lx-800-r11/Kconfig
@@ -45,19 +45,4 @@ config IRQ_SLOT_COUNT
 	int
 	default 7
 
-choice
-	prompt "Core/GLIU Frequency"
-	default CORE_GLIU_500_266
-
-config CORE_GLIU_500_266
-	bool "500MHz / 266MHz"
-
-config CORE_GLIU_500_333
-	bool "500MHz / 333MHz"
-
-config CORE_GLIU_500_400
-	bool "500MHz / 400MHz"
-
-endchoice
-
 endif # BOARD_IEI_PM_LX_800_R11
diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c
index f756622..d91140f 100644
--- a/src/mainboard/iei/pm-lx-800-r11/romstage.c
+++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c
@@ -46,15 +46,8 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
 	return smbus_read_byte(device, address);
 }
 
-#if CONFIG_CORE_GLIU_500_400
-#	define PLLMSRhi 0x0000059c
-#elif CONFIG_CORE_GLIU_500_333
-#	define PLLMSRhi 0x0000049c
-#else
-#	define PLLMSRhi 0x0000039c
-#endif
-
-#define PLLMSRlo 0x07de000
+#define PLLMSRhi 0x0000039c
+#define PLLMSRlo 0x07de0000
 
 #include <northbridge/amd/lx/raminit.h>
 #include <northbridge/amd/lx/pll_reset.c>