[coreboot] New patch to review for coreboot: a47f09d AGESA family 12 changes to fix torpedo warnings

[Martin Roth (martin@se-eng.com)]

Martin Roth (martin at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/667

-gerrit

commit a47f09d8e723896eb63ae8437250c0ee7ce68da9
Author: Martin Roth <martin at se-eng.com>
Date:   Fri Feb 17 13:16:04 2012 -0700

    AGESA family 12 changes to fix torpedo warnings
    
    Fixes the warnings generated in the torpedo mainboard build by AGESA.
    Removing broken tests.
    
    Change-Id: Ib444fa2bf4dd94cadb4ce33040eb5650d1c0325b
    Signed-off-by: Martin L Roth <martin at se-eng.com>
---
 .../amd/agesa/f12/Include/OptionMemoryInstall.h    |    9 +++++
 .../amd/agesa/f12/Include/PlatformInstall.h        |   32 +++++++++++++++++++-
 2 files changed, 40 insertions(+), 1 deletions(-)

diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h
index 35825d8..cfb55cc 100755
--- a/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h
@@ -44,6 +44,10 @@
 #ifndef _OPTION_MEMORY_INSTALL_H_
 #define _OPTION_MEMORY_INSTALL_H_
 
+#ifndef RUN_BROKEN_AGESA_TESTS
+	#define RUN_BROKEN_AGESA_TESTS 0
+#endif
+
 /*-------------------------------------------------------------------------------
  *  This option file is designed to be included into the platform solution install
  *  file. The platform solution install file will define the options status.
@@ -3395,9 +3399,14 @@ BOOLEAN MemFS3DefConstructorRet (
     NULL
   };
   CONST UINTN SIZE_OF_PLATFORM = (sizeof (memPlatformTypeInstalled) / sizeof (MEM_PLATFORM_CFG*));
+/* SIZE_OF_PLATFORM is not defined when the preprocessor runs
+ * Removing this test for coreboot.
+ */
+#if RUN_BROKEN_AGESA_TESTS
   #if SIZE_OF_PLATFORM > MAX_PLATFORM_TYPES
     #error   Size of memPlatformTypeInstalled array larger than MAX_PLATFORM_TYPES
   #endif
+#endif
 
   /*---------------------------------------------------------------------------------------------------
    * EXTRACTABLE PLATFORM SPECIFIC CONFIGURATION
diff --git a/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h
index 50275eb..ba8bc1f 100755
--- a/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h
@@ -42,6 +42,10 @@
  *
  ***************************************************************************/
 
+#ifndef RUN_BROKEN_AGESA_TESTS
+	#define RUN_BROKEN_AGESA_TESTS 0
+#endif
+
 /*****************************************************************************
  *
  * Start processing the user options:  First, set default settings
@@ -76,7 +80,7 @@
 VOLATILE  AMD_MODULE_HEADER mCpuModuleID = {
   //ModuleHeaderSignature
   // Remove 'DOM$' as temp solution before update BinUtil.exe ,
-  '0000',
+  Int32FromChar ('0', '0', '0', '0'),
   //ModuleIdentifier[8]
   AGESA_ID,
   //ModuleVersion[12]
@@ -2150,6 +2154,10 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
     #error    No Dram init option has been selected
   #endif
 #endif
+/* As an ENUM, DDRXXX_FREQUENCY is not defined when the c preprocessor runs.
+ * Removing this test for coreboot.
+ */
+#if RUN_BROKEN_AGESA_TESTS
 // Ensure the frequency limit is valid
 #if (CFG_MEMORY_BUS_FREQUENCY_LIMIT != DDR1866_FREQUENCY) && (CFG_MEMORY_BUS_FREQUENCY_LIMIT != 933)
   #if (CFG_MEMORY_BUS_FREQUENCY_LIMIT != DDR1600_FREQUENCY) && (CFG_MEMORY_BUS_FREQUENCY_LIMIT != 800)
@@ -2168,6 +2176,13 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
     #endif
   #endif
 #endif
+
+#endif
+/* As an ENUM, TIMING_MODE_XXX is not defined when the c preprocessor runs.
+ * Removing this test for coreboot.
+ */
+#if RUN_BROKEN_AGESA_TESTS
+
 // Ensure timing mode is valid
 #if CFG_TIMING_MODE_SELECT != TIMING_MODE_SPECIFIC
   #if CFG_TIMING_MODE_SELECT != TIMING_MODE_LIMITED
@@ -2176,6 +2191,8 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
     #endif
   #endif
 #endif
+
+#endif
 // Ensure the scrub rate is valid
 #if ((CFG_SCRUB_DRAM_RATE > 0x16) && (CFG_SCRUB_DRAM_RATE != 0xFF))
   #error    BLDCFG: Unsupported dram scrub rate set
@@ -2192,12 +2209,19 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
 #if CFG_SCRUB_DC_RATE > 0x16
   #error   BLDCFG: Unsupported Dcache scrub rate set
 #endif
+/* As an ENUM, QUADRANK_XXX is not defined when the c preprocessor runs.
+ * Removing this test for coreboot.
+ */
+#if RUN_BROKEN_AGESA_TESTS
+
 // Ensure Quad rank dimm type is valid
 #if CFG_MEMORY_QUADRANK_TYPE != QUADRANK_UNBUFFERED
   #if CFG_MEMORY_QUADRANK_TYPE != QUADRANK_REGISTERED
     #error     BLDCFG: Invalid quad rank dimm type set
   #endif
 #endif
+
+#endif
 // Ensure ECC symbol size is valid
 #if CFG_ECC_SYMBOL_SIZE != ECCSYMBOLSIZE_USE_BKDG
   #if CFG_ECC_SYMBOL_SIZE != ECCSYMBOLSIZE_FORCE_X4
@@ -2206,6 +2230,11 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
     #endif
   #endif
 #endif
+/* As an ENUM, POWER_DOWN_BY_XXX is not defined when the c preprocessor runs.
+ * Removing this test for coreboot.
+ */
+#if RUN_BROKEN_AGESA_TESTS
+
 // Ensure power down mode is valid
 #if CFG_POWER_DOWN_MODE != POWER_DOWN_BY_CHIP_SELECT
   #if CFG_POWER_DOWN_MODE != POWER_DOWN_BY_CHANNEL
@@ -2213,6 +2242,7 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE;
   #endif
 #endif
 
+#endif
 /*****************************************************************************
  *
  * Process the option logic, setting local control variables