[coreboot] How to port core boot
kyosti.malkki at gmail.com
Tue Feb 7 15:57:50 CET 2012
On Tue, 2012-02-07 at 18:08 +0330, ali hagigat wrote:
> Thank you, Kyösti, for the reply. I tested the modified Coreboot by
> 115200 Buad rate, again the same message(latest post code seems to be
> 0x11)(modified Coreboot contains sdram_enable() changed and some
> fuction calls was commented out in romstage.c and i am using
> build/coreboot.rom as the final image on ROM chip):
> coreboot-4.0-1959-g950f20a-dirty Tue Feb 7 17:40:50 IRST 2012 starting...
> Testing DRAM : 02000000 - 10000000
> DRAM fill: 0x02000000-0x10000000
> DRAM filled
> DRAM verify: 0x02000000-0x10000000
> DRAM range verified.
> Loading image.
> Searching for fallback/coreboot_ram
> Check fallback/romstage
> Check fallback/coreboot_ram
> Stage: loading fallback/coreboot_ram @ 0x100000 (180224 bytes), entry @ 0x100000
> lzma: Decoding error = 1
> FATAL: Essential component is missing.
Your ram_check() still does not cover 1M-3M range. Failure to decompress
coreboot_ram (lzma decoding error) screams a problem with initialising
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