[coreboot] Patch set updated for coreboot: ae62dec M4A785T-M: Add support for external GFX.

[Denis Carikli (GNUtoo@no-log.org)]

Denis Carikli (GNUtoo at no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2067

-gerrit

commit ae62decb3cf719e497e725d0829e9a8008b24b32
Author: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
Date:   Thu Dec 20 18:45:53 2012 +0100

    M4A785T-M: Add support for external GFX.
    
    This commit enables the external graphics card.
    In order to work, the internal graphic card has to be
      disabled, that is done in src/device/device.c trough:
      vga_onboard->ops->disable(vga_onboard);
      which calls the RS780 disable operation introduced in the following
      commit: "rs780: add .disable pcie_ops"
    
    This commit was tested with and without the following card:
      02:00.0 VGA compatible controller: nVidia Corporation GT218 [GeForce 210] (rev a2)
    
    Thanks Aladyshev for the pointer(in the #coreboot IRC channel on Freenode servers):
      Dec 20 19:43:32 <Aladyshev>	If you list your internal card in devicetree.cb,
      coreboot will distinguish external and internal VGA and choose external one
    
    Change-Id: I92e59dffd158db096a6e99d1ef6e2e248fef933c
    Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
---
 src/mainboard/asus/m4a785t-m/devicetree.cb | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/asus/m4a785t-m/devicetree.cb b/src/mainboard/asus/m4a785t-m/devicetree.cb
index e8764b1..0299fc2 100644
--- a/src/mainboard/asus/m4a785t-m/devicetree.cb
+++ b/src/mainboard/asus/m4a785t-m/devicetree.cb
@@ -10,8 +10,10 @@ chip northbridge/amd/amdfam10/root_complex
 			device pci 18.0 on #  northbridge
 				chip southbridge/amd/rs780
 					device pci 0.0 on end # HT  	0x9600
-					device pci 1.0 on end # Internal Graphics P2P bridge 0x9602
-					device pci 2.0 off end # PCIE P2P bridge (external graphics) 0x9603
+					device pci 1.0 on # Internal Graphics P2P bridge 0x9602
+						device pci 5.0 on end # onboard VGA
+					end
+					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603
 					device pci 3.0 off end # PCIE P2P bridge	0x960b
 					device pci 4.0 off end # PCIE P2P bridge 0x9604
 					device pci 5.0 off end # PCIE P2P bridge 0x9605
@@ -24,7 +26,7 @@ chip northbridge/amd/amdfam10/root_complex
 					register "gpp_configuration" = "3"   # Configuration D default
 					register "port_enable" = "0x6fc"
 					register "gfx_dev2_dev3" = "1"
-					register "gfx_dual_slot" = "2"
+					register "gfx_dual_slot" = "0"
 
 					register "gfx_lane_reversal" = "0"
 					register "gfx_tmds" = "0"