No subject

Sun Dec 9 17:34:17 CET 2012

The PROMJet has a clever function where a sequence of reads from ROM
are interpreted as a debug write, and sent to the host.

Could be a killer feature if we can't use any kind of serial.
(I know that the PROMJet is expensive, but the feature is simple.)

Will at least some part of the ROM always be readable after reset?
Is that defined by the CPU?

Does/will it happen that something between CPU and flash actually
pre-loads the ROM so that there's no direct communication path?


More information about the coreboot mailing list