[coreboot] Coreboot with a Linux kernel and initramfs as payload.

Hoàng Tùng hoangtung1005 at gmail.com
Thu Aug 30 07:02:15 CEST 2012


Hi all,

I'm trying to build Coreboot with a Linux kernel and initramfs as payload.
Here is my step to do it
1. Download souce code Coreboot , linux-2.6.34.13 , busybox-1.20.2
2. Build busybox and make rootfs ( i build static  )
$ cd busybox-1.20.2
$ make menuconfig
$ make
$ mkdir _install
$ make install
        $ cd _install
        $ find . | cpio -o --format=newc > ../rootfs.img
        $ cd ..
        $ gzip -c rootfs.img > rootfs.img.gz
3. Compile a minimal linux kernel
$ cd  linux-2.6.34.13
$ make menuconfig
$ make
4. Convert the kernel image and rootfs to ELF
        $ mkelfImage --kernel=bzImage --ramdisk=rootfs.img
--output=payload.elf
5. Compile Coreboot for qemu using this payload.elf as payload
6. Start qemu using Coreboot.rom
       $ qemu -bios coreboot/build/coreboot.rom -hda disk.img -nographic

But result is failed. QEMU hang out and can't continue
Below is qemu log.

Could you give me some advice ??
Thanks

-------------------------------------------------------------------------
qemu log
------------------------------------------------------------------------
open /dev/kvm: No such file or directory
Could not initialize KVM, will disable KVM support
qemu: pci_add_option_rom: failed to find romfile "pxe-rtl8139.bin"


coreboot-4.0-2732-g0db6820-dirty Thu Aug 30 11:34:32 ICT 2012 starting...
Loading image.
CBFS: Looking for 'fallback/coreboot_ram'
CBFS: found.
CBFS: loading stage fallback/coreboot_ram @ 0x100000 (147456 bytes), entry
@ 0x100000
Jumping to image.
coreboot-4.0-2732-g0db6820-dirty Thu Aug 30 11:34:32 ICT 2012 booting...
Enumerating buses...
Show all devs...Before device enumeration.
Root Device: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
Compare with tree...
Root Device: enabled 1
 PCI_DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:01.1: enabled 1
scan_static_bus for Root Device
PCI_DOMAIN: 0000 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/1237] ops
PCI: 00:00.0 [8086/1237] enabled
PCI: 00:01.0 [8086/7000] bus ops
PCI: 00:01.0 [8086/7000] enabled
PCI: 00:01.1 [8086/7010] ops
PCI: 00:01.1 [8086/7010] enabled
PCI: 00:01.3 [8086/7113] bus ops
pwrmgt_enable: gpo default missing in devicetree.cb!
PCI: 00:01.3 [8086/7113] enabled
PCI: 00:02.0 [1013/00b8] ops
PCI: 00:02.0 [1013/00b8] enabled
PCI: 00:03.0 [10ec/8139] enabled
scan_static_bus for PCI: 00:01.0
scan_static_bus for PCI: 00:01.0 done
scan_static_bus for PCI: 00:01.3
scan_static_bus for PCI: 00:01.3 done
PCI: pci_scan_bus returning with max=000
scan_static_bus for Root Device done
done
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 PCI_DOMAIN: 0000
  PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags
40040100 index 10000000
  PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff
flags 40040200 index 10000100
  PCI_DOMAIN: 0000 resource base fec00000 size 100000 align 0 gran 0 limit
ffffffff flags e0000200 index 2
  PCI_DOMAIN: 0000 resource base fee00000 size 10000 align 0 gran 0 limit
ffffffff flags e0000200 index 3
   PCI: 00:00.0
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags
c0000100 index 1
   PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0
flags d0000200 index 2
   PCI: 00:01.1
   PCI: 00:01.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100
index 20
   PCI: 00:01.3
   PCI: 00:01.3 resource base e400 size 40 align 0 gran 0 limit ffff flags
d0000100 index 1
   PCI: 00:01.3 resource base f00 size 10 align 0 gran 0 limit ffff flags
d0000100 index 2
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 2000000 align 25 gran 25 limit
ffffffff flags 1200 index 10
   PCI: 00:02.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff
flags 200 index 14
   PCI: 00:02.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff
flags 2200 index 30
   PCI: 00:03.0
   PCI: 00:03.0 resource base 0 size 100 align 8 gran 8 limit ffff flags
100 index 10
   PCI: 00:03.0 resource base 0 size 100 align 8 gran 8 limit ffffffff
flags 200 index 14
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0
limit: ffff
PCI: 00:03.0 10 *  [0x0 - 0xff] io
PCI: 00:01.1 20 *  [0x400 - 0x40f] io
PCI_DOMAIN: 0000 compute_resources_io: base: 410 size: 410 align: 8 gran: 0
limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0
limit: ffffffff
PCI: 00:02.0 10 *  [0x0 - 0x1ffffff] prefmem
PCI: 00:02.0 30 *  [0x2000000 - 0x200ffff] mem
PCI: 00:02.0 14 *  [0x2010000 - 0x2010fff] mem
PCI: 00:03.0 14 *  [0x2011000 - 0x20110ff] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 2011100 size: 2011100 align:
25 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:00.0
constrain_resources: PCI: 00:01.0
constrain_resources: PCI: 00:01.1
constrain_resources: PCI: 00:01.3
constrain_resources: PCI: 00:02.0
constrain_resources: PCI: 00:03.0
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
lim->base 00001000 lim->limit 0000e3ff
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
lim->base 00000000 lim->limit febfffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:410 align:8 gran:0
limit:e3ff
Assigned: PCI: 00:03.0 10 *  [0x1000 - 0x10ff] io
Assigned: PCI: 00:01.1 20 *  [0x1400 - 0x140f] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 1410 size: 410 align: 8
gran: 0 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:fc000000 size:2011100
align:25 gran:0 limit:febfffff
Assigned: PCI: 00:02.0 10 *  [0xfc000000 - 0xfdffffff] prefmem
Assigned: PCI: 00:02.0 30 *  [0xfe000000 - 0xfe00ffff] mem
Assigned: PCI: 00:02.0 14 *  [0xfe010000 - 0xfe010fff] mem
Assigned: PCI: 00:03.0 14 *  [0xfe011000 - 0xfe0110ff] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: fe011100 size: 2011100
align: 25 gran: 0 done
Root Device assign_resources, bus 0 link: 0
Detected 393216 Kbytes (384 MiB) RAM.
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.1 20 <- [0x0000001400 - 0x000000140f] size 0x00000010 gran 0x04
io
PCI: 00:02.0 10 <- [0x00fc000000 - 0x00fdffffff] size 0x02000000 gran 0x19
prefmem
PCI: 00:02.0 14 <- [0x00fe010000 - 0x00fe010fff] size 0x00001000 gran 0x0c
mem
PCI: 00:02.0 30 <- [0x00fe000000 - 0x00fe00ffff] size 0x00010000 gran 0x10
romem
PCI: 00:03.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08
io
PCI: 00:03.0 14 <- [0x00fe011000 - 0x00fe0110ff] size 0x00000100 gran 0x08
mem
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 PCI_DOMAIN: 0000
  PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
  PCI_DOMAIN: 0000 resource base 1000 size 410 align 8 gran 0 limit e3ff
flags 40040100 index 10000000
  PCI_DOMAIN: 0000 resource base fc000000 size 2011100 align 25 gran 0
limit febfffff flags 40040200 index 10000100
  PCI_DOMAIN: 0000 resource base fec00000 size 100000 align 0 gran 0 limit
ffffffff flags e0000200 index 2
  PCI_DOMAIN: 0000 resource base fee00000 size 10000 align 0 gran 0 limit
ffffffff flags e0000200 index 3
  PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags
e0004200 index a
  PCI_DOMAIN: 0000 resource base c0000 size 17f40000 align 0 gran 0 limit 0
flags e0004200 index b
   PCI: 00:00.0
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags
c0000100 index 1
   PCI: 00:01.0 resource base ff800000 size 800000 align 0 gran 0 limit 0
flags d0000200 index 2
   PCI: 00:01.1
   PCI: 00:01.1 resource base 1400 size 10 align 4 gran 4 limit e3ff flags
60000100 index 20
   PCI: 00:01.3
   PCI: 00:01.3 resource base e400 size 40 align 0 gran 0 limit ffff flags
d0000100 index 1
   PCI: 00:01.3 resource base f00 size 10 align 0 gran 0 limit ffff flags
d0000100 index 2
   PCI: 00:02.0
   PCI: 00:02.0 resource base fc000000 size 2000000 align 25 gran 25 limit
febfffff flags 60001200 index 10
   PCI: 00:02.0 resource base fe010000 size 1000 align 12 gran 12 limit
febfffff flags 60000200 index 14
   PCI: 00:02.0 resource base fe000000 size 10000 align 16 gran 16 limit
febfffff flags 60002200 index 30
   PCI: 00:03.0
   PCI: 00:03.0 resource base 1000 size 100 align 8 gran 8 limit e3ff flags
60000100 index 10
   PCI: 00:03.0 resource base fe011000 size 100 align 8 gran 8 limit
febfffff flags 60000200 index 14
Done allocating resources.
Enabling resources...
PCI: 00:00.0 cmd <- 00
PCI: 00:01.0 cmd <- 00
PCI: 00:01.1 cmd <- 01
PCI: 00:01.3 cmd <- 00
PCI: 00:02.0 cmd <- 03
PCI: 00:03.0 cmd <- 03
done.
Initializing devices...
Root Device init
PCI: 00:00.0 init
Keyboard init...
setting ethernet
Assigning IRQ 11 to 0:3.0
i8259_configure_irq_trigger: current interrupts are 0x0
i8259_configure_irq_trigger: try to set interrupts 0x800
PCI: 00:01.0 init
RTC Init
PCI: 00:01.1 init
IDE: Primary IDE interface: on
IDE: Secondary IDE interface: on
IDE: Access to legacy IDE ports: off
PCI: 00:02.0 init
CBFS: Looking for 'pci1013,00b8.rom'
CBFS: Could not find file 'pci1013,00b8.rom'.
Option ROM address for PCI: 00:02.0 = fe000000
PCI expansion ROM, signature 0xaa55, INIT size 0x8c00, data ptr 0x010f
PCI ROM image, vendor ID 1013, device ID 00b8,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from fe000000 to 0xc0000, 0x8c00 bytes
Real mode stub @00000600: 867 bytes
Calling Option ROM...
... Option ROM returned.
PCI: 00:03.0 init
CBFS: Looking for 'pci10ec,8139.rom'
CBFS: Could not find file 'pci10ec,8139.rom'.
Devices initialized
Show all devs...After init.
Root Device: enabled 1
PCI_DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:01.3: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
Re-Initializing CBMEM area to 0x17fe0000
Initializing CBMEM area to 0x17fe0000 (131072 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 17fe0200...ok
High Tables Base is 17fe0000.
Copying Interrupt Routing Table to 0x000f0000... done.
Adding CBMEM entry as no. 2
Copying Interrupt Routing Table to 0x17fe0400... done.
PIRQ table: 128 bytes.
Adding CBMEM entry as no. 3
smbios_write_tables: 17fe1400
Root Device (QEMU Mainboard)
PCI_DOMAIN: 0000 (QEMU Northbridge)
PCI: 00:00.0 (QEMU Northbridge)
PCI: 00:01.0 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
PCI: 00:01.1 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
PCI: 00:01.3 ()
PCI: 00:02.0 ()
PCI: 00:03.0 ()
SMBIOS tables: 377 bytes.
Adding CBMEM entry as no. 4
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum cbe0
New low_table_end: 0x00000528
Now going to write high coreboot table at 0x17fe1c00
rom_table_end = 0x17fe1c00
Adjust low_table_end from 0x00000528 to 0x00001000
Adjust rom_table_end from 0x17fe1c00 to 0x17ff0000
Adding high table area
coreboot memory table:
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-0000000017fdffff: RAM
 3. 0000000017fe0000-0000000017ffffff: CONFIGURATION TABLES
 4. 00000000ff800000-00000000ffffffff: RESERVED
Wrote coreboot table at: 17fe1c00, 0x1f0 bytes, checksum 2ae5
coreboot table: 520 bytes.
Multiboot Information structure has been written.
 0. FREE SPACE 17fe9c00 00016400
 1. GDT        17fe0200 00000200
 2. IRQ TABLE  17fe0400 00001000
 3. SMBIOS     17fe1400 00000800
 4. COREBOOT   17fe1c00 00008000
Lam den day thoiCBFS: Looking for 'fallback/payload'
CBFS: found.
Got a payload
CPU0: stack from 00118000 to 00120000:Lowest stack address 0011fbb8
Loading segment from rom address 0xff809bb8
  code (compression=1)
  New segment dstaddr 0x10000 memsize 0x13224 srcaddr 0xff809c44 filesize
0x1003
  (cleaned up) New segment addr 0x10000 size 0x13224 offset 0xff809c44
filesize 0x1003
Loading segment from rom address 0xff809bd4
  BSS 0x00020000 (4208 byte)
Loading segment from rom address 0xff809bf0
  code (compression=0)
  New segment dstaddr 0x100000 memsize 0x700000 srcaddr 0xff80ac47 filesize
0xe0680
  (cleaned up) New segment addr 0x100000 size 0x700000 offset 0xff80ac47
filesize 0xe0680
Loading segment from rom address 0xff809c0c
  code (compression=0)
  New segment dstaddr 0x800000 memsize 0xdc459 srcaddr 0xff8eb2c7 filesize
0xdc459
  (cleaned up) New segment addr 0x800000 size 0xdc459 offset 0xff8eb2c7
filesize 0xdc459
Loading segment from rom address 0xff809c28
  Entry Point 0x00000000
Loading Segment: addr: 0x0000000000020000 memsz: 0x0000000000001070 filesz:
0x0000000000000000
lb: [0x0000000000100000, 0x0000000000124000)
Post relocation: addr: 0x0000000000020000 memsz: 0x0000000000001070 filesz:
0x0000000000000000
Loading Segment: addr: 0x0000000000010000 memsz: 0x0000000000013224 filesz:
0x0000000000001003
lb: [0x0000000000100000, 0x0000000000124000)
Post relocation: addr: 0x0000000000010000 memsz: 0x0000000000013224 filesz:
0x0000000000001003
using LZMA
[ 0x00010000, 0001199c, 0x00023224) <- ff809c44
Clearing Segment: addr: 0x000000000001199c memsz: 0x0000000000011888
dest 00010000, end 00023224, bouncebuffer 178bc000
Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000700000 filesz:
0x00000000000e0680
lb: [0x0000000000100000, 0x0000000000124000)
segment: [0x0000000000100000, 0x00000000001e0680, 0x0000000000800000)
   late: [0x0000000000124000, 0x00000000001e0680, 0x0000000000800000)
 bounce: [0x00000000178bc000, 0x00000000178e0000, 0x00000000178e0000)
Post relocation: addr: 0x00000000178bc000 memsz: 0x0000000000024000 filesz:
0x0000000000024000
it's not compressed!
[ 0x178bc000, 178e0000, 0x178e0000) <- ff80ac47
dest 178bc000, end 178e0000, bouncebuffer 178bc000
Loading Segment: addr: 0x0000000000124000 memsz: 0x00000000006dc000 filesz:
0x00000000000bc680
lb: [0x0000000000100000, 0x0000000000124000)
Post relocation: addr: 0x0000000000124000 memsz: 0x00000000006dc000 filesz:
0x00000000000bc680
it's not compressed!
[ 0x00124000, 001e0680, 0x00800000) <- ff82ec47
Clearing Segment: addr: 0x00000000001e0680 memsz: 0x000000000061f980
dest 00124000, end 00800000, bouncebuffer 178bc000
Loading Segment: addr: 0x0000000000800000 memsz: 0x00000000000dc459 filesz:
0x00000000000dc459
lb: [0x0000000000100000, 0x0000000000124000)
Post relocation: addr: 0x0000000000800000 memsz: 0x00000000000dc459 filesz:
0x00000000000dc459
it's not compressed!
[ 0x00800000, 008dc459, 0x008dc459) <- ff8eb2c7
dest 00800000, end 008dc459, bouncebuffer 178bc000
Loaded segments
Jumping to boot code at 10000
entry    = 0x00010000
lb_start = 0x00100000
lb_size  = 0x00024000
adjust   = 0x17ebc000
buffer   = 0x178bc000
     elf_boot_notes = 0x0010d364
adjusted_boot_notes = 0x17fc9364
Firmware type: LinuxBIOS
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