[coreboot] Patch set updated for coreboot: e9fd448 Remove chip.h files without config structure

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Mon Aug 27 08:28:58 CEST 2012


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1473

-gerrit

commit e9fd4483a7fe8df91e76813c667407f19a9041b9
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Fri Aug 24 21:54:10 2012 +0300

    Remove chip.h files without config structure
    
    Also deletes files not included in build:
        src/southbridge/amd/cimx/sb700/chip_name.c
        src/southbridge/amd/cimx/sb800/chip_name.c
        src/southbridge/amd/cimx/sb900/chip_name.c
    
    Change-Id: I2068e3859157b758ccea0ca91fa47d09a8639361
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/cpu/amd/agesa/family10/chip.h                  | 21 ------------
 src/cpu/amd/agesa/family10/chip_name.c             |  1 -
 src/cpu/amd/agesa/family12/chip.h                  | 21 ------------
 src/cpu/amd/agesa/family12/chip_name.c             |  1 -
 src/cpu/amd/agesa/family14/chip.h                  | 21 ------------
 src/cpu/amd/agesa/family14/chip_name.c             |  1 -
 src/cpu/amd/agesa/family15/chip.h                  | 21 ------------
 src/cpu/amd/agesa/family15/chip_name.c             |  1 -
 src/cpu/amd/agesa/family15tn/chip.h                | 21 ------------
 src/cpu/amd/agesa/family15tn/chip_name.c           |  1 -
 src/cpu/amd/sc520/chip.h                           |  2 --
 src/cpu/amd/sc520/sc520.c                          |  1 -
 src/cpu/amd/socket_754/chip.h                      |  2 --
 src/cpu/amd/socket_754/socket_754.c                |  1 -
 src/cpu/amd/socket_939/chip.h                      |  2 --
 src/cpu/amd/socket_939/socket_939.c                |  1 -
 src/cpu/amd/socket_940/chip.h                      |  2 --
 src/cpu/amd/socket_940/socket_940.c                |  1 -
 src/cpu/amd/socket_AM2/chip.h                      |  2 --
 src/cpu/amd/socket_AM2/socket_AM2.c                |  1 -
 src/cpu/amd/socket_AM2r2/chip.h                    | 21 ------------
 src/cpu/amd/socket_AM2r2/socket_AM2r2.c            |  1 -
 src/cpu/amd/socket_AM3/chip.h                      | 21 ------------
 src/cpu/amd/socket_AM3/socket_AM3.c                |  1 -
 src/cpu/amd/socket_ASB2/chip.h                     | 21 ------------
 src/cpu/amd/socket_ASB2/socket_ASB2.c              |  1 -
 src/cpu/amd/socket_C32/chip.h                      | 21 ------------
 src/cpu/amd/socket_C32/socket_C32.c                |  1 -
 src/cpu/amd/socket_F/chip.h                        |  2 --
 src/cpu/amd/socket_F/socket_F.c                    |  1 -
 src/cpu/amd/socket_F_1207/chip.h                   | 21 ------------
 src/cpu/amd/socket_F_1207/socket_F_1207.c          |  1 -
 src/cpu/amd/socket_S1G1/chip.h                     |  2 --
 src/cpu/amd/socket_S1G1/socket_S1G1.c              |  1 -
 src/cpu/intel/ep80579/chip.h                       | 21 ------------
 src/cpu/intel/ep80579/ep80579.c                    |  1 -
 src/cpu/intel/slot_1/chip.h                        | 22 ------------
 src/cpu/intel/slot_1/slot_1.c                      |  1 -
 src/cpu/intel/slot_2/chip.h                        |  2 --
 src/cpu/intel/slot_2/slot_2.c                      |  1 -
 src/cpu/intel/socket_441/chip.h                    | 21 ------------
 src/cpu/intel/socket_441/socket_441.c              |  1 -
 src/cpu/intel/socket_BGA956/chip.h                 |  2 --
 src/cpu/intel/socket_BGA956/socket_BGA956.c        |  1 -
 src/cpu/intel/socket_FC_PGA370/chip.h              | 22 ------------
 src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c  |  1 -
 src/cpu/intel/socket_LGA771/chip.h                 |  2 --
 src/cpu/intel/socket_LGA771/socket_LGA771.c        |  1 -
 src/cpu/intel/socket_PGA370/chip.h                 |  2 --
 src/cpu/intel/socket_PGA370/socket_PGA370.c        |  1 -
 src/cpu/intel/socket_mFCBGA479/chip.h              |  2 --
 src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c  |  1 -
 src/cpu/intel/socket_mFCPGA478/chip.h              |  2 --
 src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c  |  1 -
 src/cpu/intel/socket_mPGA478/chip.h                |  2 --
 src/cpu/intel/socket_mPGA478/socket_mPGA478.c      |  1 -
 src/cpu/intel/socket_mPGA479M/chip.h               |  2 --
 src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c    |  1 -
 src/cpu/intel/socket_mPGA603/chip.h                |  2 --
 .../intel/socket_mPGA603/socket_mPGA603_400Mhz.c   |  1 -
 src/cpu/intel/socket_mPGA604/chip.h                |  2 --
 src/cpu/intel/socket_mPGA604/socket_mPGA604.c      |  1 -
 src/cpu/intel/socket_rPGA989/chip.h                |  2 --
 src/cpu/intel/socket_rPGA989/socket_rPGA989.c      |  1 -
 src/drivers/generic/debug/chip.h                   |  2 --
 src/drivers/generic/debug/debug_dev.c              |  1 -
 src/drivers/i2c/adm1026/adm1026.c                  |  1 -
 src/drivers/i2c/adm1026/chip.h                     |  2 --
 src/drivers/i2c/adm1027/adm1027.c                  |  1 -
 src/drivers/i2c/adm1027/chip.h                     |  2 --
 src/drivers/i2c/adt7463/adt7463.c                  |  1 -
 src/drivers/i2c/adt7463/chip.h                     |  2 --
 src/drivers/i2c/i2cmux/chip.h                      |  2 --
 src/drivers/i2c/i2cmux/i2cmux.c                    |  1 -
 src/drivers/i2c/i2cmux2/chip.h                     |  2 --
 src/drivers/i2c/i2cmux2/i2cmux2.c                  |  1 -
 src/drivers/i2c/lm63/chip.h                        |  2 --
 src/drivers/i2c/lm63/lm63.c                        |  1 -
 src/drivers/i2c/w83795/chip.h                      |  2 --
 src/mainboard/emulation/qemu-x86/chip.h            |  2 --
 src/mainboard/emulation/qemu-x86/northbridge.c     |  1 -
 src/northbridge/amd/agesa/family10/chip.h          | 23 -------------
 src/northbridge/amd/agesa/family10/northbridge.c   |  2 --
 .../amd/agesa/family10/root_complex/chip.h         | 23 -------------
 src/northbridge/amd/agesa/family12/chip.h          | 23 -------------
 src/northbridge/amd/agesa/family12/northbridge.c   |  1 -
 .../amd/agesa/family12/root_complex/chip.h         | 23 -------------
 src/northbridge/amd/agesa/family14/chip.h          | 23 -------------
 src/northbridge/amd/agesa/family14/northbridge.c   |  1 -
 .../amd/agesa/family14/root_complex/chip.h         | 23 -------------
 src/northbridge/amd/agesa/family15/chip.h          | 23 -------------
 src/northbridge/amd/agesa/family15/northbridge.c   |  2 --
 .../amd/agesa/family15/root_complex/chip.h         | 23 -------------
 src/northbridge/amd/agesa/family15tn/chip.h        | 23 -------------
 src/northbridge/amd/agesa/family15tn/northbridge.c |  2 --
 .../amd/agesa/family15tn/root_complex/chip.h       | 23 -------------
 src/northbridge/amd/amdfam10/chip.h                | 23 -------------
 src/northbridge/amd/amdfam10/northbridge.c         |  2 --
 src/northbridge/amd/amdfam10/root_complex/chip.h   | 23 -------------
 src/northbridge/amd/amdk8/chip.h                   |  4 ---
 src/northbridge/amd/amdk8/northbridge.c            |  2 --
 src/northbridge/amd/amdk8/root_complex/chip.h      |  4 ---
 src/northbridge/amd/gx1/chip.h                     |  4 ---
 src/northbridge/amd/gx1/northbridge.c              |  1 -
 src/northbridge/amd/gx2/chip.h                     | 24 -------------
 src/northbridge/amd/gx2/northbridge.c              |  1 -
 src/northbridge/amd/gx2/northbridgeinit.c          |  1 -
 src/northbridge/amd/lx/chip.h                      | 23 -------------
 src/northbridge/amd/lx/northbridge.c               |  1 -
 src/northbridge/amd/lx/northbridgeinit.c           |  1 -
 src/northbridge/intel/e7501/chip.h                 |  4 ---
 src/northbridge/intel/e7501/northbridge.c          |  1 -
 src/northbridge/intel/e7505/chip.h                 |  4 ---
 src/northbridge/intel/e7505/northbridge.c          |  1 -
 src/northbridge/intel/i440bx/chip.h                | 24 -------------
 src/northbridge/intel/i440bx/northbridge.c         |  1 -
 src/northbridge/intel/i440lx/chip.h                | 24 -------------
 src/northbridge/intel/i440lx/northbridge.c         |  1 -
 src/northbridge/intel/i5000/chip.h                 | 22 ------------
 src/northbridge/intel/i5000/northbridge.c          |  1 -
 src/northbridge/intel/i82810/chip.h                | 23 -------------
 src/northbridge/intel/i82810/northbridge.c         |  1 -
 src/northbridge/intel/i82830/chip.h                | 23 -------------
 src/northbridge/intel/i82830/northbridge.c         |  1 -
 src/northbridge/intel/i855/chip.h                  | 24 -------------
 src/northbridge/intel/i855/northbridge.c           |  1 -
 src/northbridge/intel/i945/chip.h                  | 22 ------------
 src/northbridge/intel/i945/northbridge.c           |  1 -
 src/northbridge/intel/sch/chip.h                   | 22 ------------
 src/northbridge/intel/sch/northbridge.c            |  1 -
 src/northbridge/rdc/r8610/chip.h                   | 23 -------------
 src/northbridge/rdc/r8610/northbridge.c            |  1 -
 src/northbridge/via/cn400/agp.c                    |  1 -
 src/northbridge/via/cn400/chip.h                   | 23 -------------
 src/northbridge/via/cn400/northbridge.c            |  1 -
 src/northbridge/via/cn400/vga.c                    |  1 -
 src/northbridge/via/cn400/vlink.c                  |  1 -
 src/northbridge/via/cn700/agp.c                    |  1 -
 src/northbridge/via/cn700/chip.h                   | 23 -------------
 src/northbridge/via/cn700/northbridge.c            |  1 -
 src/northbridge/via/cn700/vga.c                    |  1 -
 src/northbridge/via/cx700/chip.h                   | 22 ------------
 src/northbridge/via/cx700/northbridge.c            |  1 -
 src/northbridge/via/cx700/vga.c                    |  1 -
 src/northbridge/via/vt8601/chip.h                  |  4 ---
 src/northbridge/via/vt8601/northbridge.c           |  1 -
 src/northbridge/via/vt8623/chip.h                  |  4 ---
 src/northbridge/via/vt8623/northbridge.c           |  1 -
 src/northbridge/via/vt8623/vga.c                   |  1 -
 src/northbridge/via/vx800/chip.h                   | 22 ------------
 src/northbridge/via/vx800/ide.c                    |  5 ---
 src/northbridge/via/vx800/lpc.c                    |  1 -
 src/northbridge/via/vx800/northbridge.c            |  1 -
 src/northbridge/via/vx800/vga.c                    |  1 -
 src/southbridge/amd/cimx/sb700/chip_name.c         | 25 --------------
 src/southbridge/amd/cimx/sb800/chip_name.c         | 25 --------------
 src/southbridge/amd/cimx/sb900/chip_name.c         | 25 --------------
 src/southbridge/intel/i82801cx/chip.h              |  8 -----
 src/southbridge/intel/i82801cx/i82801cx.h          |  1 -
 src/southbridge/intel/pxhd/chip.h                  |  5 ---
 src/southbridge/intel/pxhd/pxhd.h                  |  1 -
 src/southbridge/ti/pcixx12/chip.h                  | 28 ---------------
 src/southbridge/ti/pcixx12/pcixx12.c               |  2 --
 src/superio/fintek/f71805f/chip.h                  | 33 ------------------
 src/superio/fintek/f71805f/superio.c               |  1 -
 src/superio/fintek/f71859/chip.h                   | 31 -----------------
 src/superio/fintek/f71859/superio.c                |  1 -
 src/superio/intel/i3100/chip.h                     | 30 ----------------
 src/superio/intel/i3100/superio.c                  |  1 -
 src/superio/ite/it8661f/chip.h                     | 33 ------------------
 src/superio/ite/it8661f/superio.c                  |  1 -
 src/superio/ite/it8705f/chip.h                     | 33 ------------------
 src/superio/ite/it8705f/superio.c                  |  3 --
 src/superio/nsc/pc87382/chip.h                     | 30 ----------------
 src/superio/nsc/pc87382/superio.c                  |  1 -
 src/superio/nsc/pc87384/chip.h                     | 30 ----------------
 src/superio/nsc/pc87384/superio.c                  |  1 -
 src/superio/nsc/pc87392/chip.h                     | 30 ----------------
 src/superio/nsc/pc87392/superio.c                  |  1 -
 src/superio/smsc/lpc47n217/chip.h                  | 30 ----------------
 src/superio/smsc/lpc47n217/superio.c               |  4 ---
 src/superio/via/vt1211/chip.h                      | 30 ----------------
 src/superio/via/vt1211/vt1211.c                    |  1 -
 util/sconfig/main.c                                | 40 ++++++++++++----------
 util/sconfig/sconfig.h                             |  1 +
 185 files changed, 22 insertions(+), 1550 deletions(-)

diff --git a/src/cpu/amd/agesa/family10/chip.h b/src/cpu/amd/agesa/family10/chip.h
deleted file mode 100644
index 4f9fa77..0000000
--- a/src/cpu/amd/agesa/family10/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_amd_agesa_family10_config {
-};
diff --git a/src/cpu/amd/agesa/family10/chip_name.c b/src/cpu/amd/agesa/family10/chip_name.c
index d99769c..656b4a2 100644
--- a/src/cpu/amd/agesa/family10/chip_name.c
+++ b/src/cpu/amd/agesa/family10/chip_name.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_agesa_family10_ops = {
 	CHIP_NAME("AMD CPU Family 10h")
diff --git a/src/cpu/amd/agesa/family12/chip.h b/src/cpu/amd/agesa/family12/chip.h
deleted file mode 100644
index 0eaa0e2..0000000
--- a/src/cpu/amd/agesa/family12/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_amd_agesa_family12_config {
-};
diff --git a/src/cpu/amd/agesa/family12/chip_name.c b/src/cpu/amd/agesa/family12/chip_name.c
index 5de72c7..6574615 100644
--- a/src/cpu/amd/agesa/family12/chip_name.c
+++ b/src/cpu/amd/agesa/family12/chip_name.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_agesa_family12_ops = {
 	CHIP_NAME("AMD CPU Family 12h")
diff --git a/src/cpu/amd/agesa/family14/chip.h b/src/cpu/amd/agesa/family14/chip.h
deleted file mode 100644
index 59c7cfe..0000000
--- a/src/cpu/amd/agesa/family14/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_amd_agesa_family14_config {
-};
diff --git a/src/cpu/amd/agesa/family14/chip_name.c b/src/cpu/amd/agesa/family14/chip_name.c
index 2c296f5..474edc7 100644
--- a/src/cpu/amd/agesa/family14/chip_name.c
+++ b/src/cpu/amd/agesa/family14/chip_name.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_agesa_family14_ops = {
 	CHIP_NAME("AMD CPU Family 14h")
diff --git a/src/cpu/amd/agesa/family15/chip.h b/src/cpu/amd/agesa/family15/chip.h
deleted file mode 100644
index e6daaef..0000000
--- a/src/cpu/amd/agesa/family15/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_amd_agesa_family15_config {
-};
diff --git a/src/cpu/amd/agesa/family15/chip_name.c b/src/cpu/amd/agesa/family15/chip_name.c
index 963a423..3ca6e9f 100644
--- a/src/cpu/amd/agesa/family15/chip_name.c
+++ b/src/cpu/amd/agesa/family15/chip_name.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_agesa_family15_ops = {
 	CHIP_NAME("AMD CPU Family 15h")
diff --git a/src/cpu/amd/agesa/family15tn/chip.h b/src/cpu/amd/agesa/family15tn/chip.h
deleted file mode 100644
index 5ad93c5..0000000
--- a/src/cpu/amd/agesa/family15tn/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_amd_agesa_family15tn_config {
-};
diff --git a/src/cpu/amd/agesa/family15tn/chip_name.c b/src/cpu/amd/agesa/family15tn/chip_name.c
index a2a5519..d923260 100644
--- a/src/cpu/amd/agesa/family15tn/chip_name.c
+++ b/src/cpu/amd/agesa/family15tn/chip_name.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_agesa_family15tn_ops = {
 	CHIP_NAME("AMD CPU Family 15h")
diff --git a/src/cpu/amd/sc520/chip.h b/src/cpu/amd/sc520/chip.h
deleted file mode 100644
index 64f3a85..0000000
--- a/src/cpu/amd/sc520/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_sc520_config {
-};
diff --git a/src/cpu/amd/sc520/sc520.c b/src/cpu/amd/sc520/sc520.c
index 059e4fd..382eb87 100644
--- a/src/cpu/amd/sc520/sc520.c
+++ b/src/cpu/amd/sc520/sc520.c
@@ -14,7 +14,6 @@
 #include <string.h>
 #include <bitops.h>
 #include <delay.h>
-#include "chip.h"
 
 /*
  * set up basic things ...
diff --git a/src/cpu/amd/socket_754/chip.h b/src/cpu/amd/socket_754/chip.h
deleted file mode 100644
index 197145f..0000000
--- a/src/cpu/amd/socket_754/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_754_config {
-};
diff --git a/src/cpu/amd/socket_754/socket_754.c b/src/cpu/amd/socket_754/socket_754.c
index 8fdcf57..f75c1ec 100644
--- a/src/cpu/amd/socket_754/socket_754.c
+++ b/src/cpu/amd/socket_754/socket_754.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 
 struct chip_operations cpu_amd_socket_754_ops = {
diff --git a/src/cpu/amd/socket_939/chip.h b/src/cpu/amd/socket_939/chip.h
deleted file mode 100644
index ca93451..0000000
--- a/src/cpu/amd/socket_939/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_939_config {
-};
diff --git a/src/cpu/amd/socket_939/socket_939.c b/src/cpu/amd/socket_939/socket_939.c
index 6563752..a44a8a6 100644
--- a/src/cpu/amd/socket_939/socket_939.c
+++ b/src/cpu/amd/socket_939/socket_939.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_socket_939_ops = {
 	CHIP_NAME("Socket 939 CPU")
diff --git a/src/cpu/amd/socket_940/chip.h b/src/cpu/amd/socket_940/chip.h
deleted file mode 100644
index 8b96614..0000000
--- a/src/cpu/amd/socket_940/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_940_config {
-};
diff --git a/src/cpu/amd/socket_940/socket_940.c b/src/cpu/amd/socket_940/socket_940.c
index 54531ef..872f040 100644
--- a/src/cpu/amd/socket_940/socket_940.c
+++ b/src/cpu/amd/socket_940/socket_940.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_socket_940_ops = {
 	CHIP_NAME("Socket 940 CPU")
diff --git a/src/cpu/amd/socket_AM2/chip.h b/src/cpu/amd/socket_AM2/chip.h
deleted file mode 100644
index 5d9e875..0000000
--- a/src/cpu/amd/socket_AM2/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_AM2_config {
-};
diff --git a/src/cpu/amd/socket_AM2/socket_AM2.c b/src/cpu/amd/socket_AM2/socket_AM2.c
index 474e19d..60378ab 100644
--- a/src/cpu/amd/socket_AM2/socket_AM2.c
+++ b/src/cpu/amd/socket_AM2/socket_AM2.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_socket_AM2_ops = {
 	CHIP_NAME("Socket AM2 CPU")
diff --git a/src/cpu/amd/socket_AM2r2/chip.h b/src/cpu/amd/socket_AM2r2/chip.h
deleted file mode 100644
index 1c93a99..0000000
--- a/src/cpu/amd/socket_AM2r2/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_amd_socket_AM2r2_config {
-};
diff --git a/src/cpu/amd/socket_AM2r2/socket_AM2r2.c b/src/cpu/amd/socket_AM2r2/socket_AM2r2.c
index 3f98e53..d618563 100644
--- a/src/cpu/amd/socket_AM2r2/socket_AM2r2.c
+++ b/src/cpu/amd/socket_AM2r2/socket_AM2r2.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_socket_AM2r2_ops = {
 	CHIP_NAME("socket AM2r2")
diff --git a/src/cpu/amd/socket_AM3/chip.h b/src/cpu/amd/socket_AM3/chip.h
deleted file mode 100644
index 70f6b1f..0000000
--- a/src/cpu/amd/socket_AM3/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_amd_socket_AM3_config {
-};
diff --git a/src/cpu/amd/socket_AM3/socket_AM3.c b/src/cpu/amd/socket_AM3/socket_AM3.c
index 75b3970..91871e8 100644
--- a/src/cpu/amd/socket_AM3/socket_AM3.c
+++ b/src/cpu/amd/socket_AM3/socket_AM3.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_socket_AM3_ops = {
 	CHIP_NAME("socket AM3")
diff --git a/src/cpu/amd/socket_ASB2/chip.h b/src/cpu/amd/socket_ASB2/chip.h
deleted file mode 100644
index 5939c2b..0000000
--- a/src/cpu/amd/socket_ASB2/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_amd_socket_ASB2_config {
-};
diff --git a/src/cpu/amd/socket_ASB2/socket_ASB2.c b/src/cpu/amd/socket_ASB2/socket_ASB2.c
index fd3b522..3c38a8c 100644
--- a/src/cpu/amd/socket_ASB2/socket_ASB2.c
+++ b/src/cpu/amd/socket_ASB2/socket_ASB2.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_socket_ASB2_ops = {
 	CHIP_NAME("socket ASB2")
diff --git a/src/cpu/amd/socket_C32/chip.h b/src/cpu/amd/socket_C32/chip.h
deleted file mode 100644
index e9d57c7..0000000
--- a/src/cpu/amd/socket_C32/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_amd_socket_C32_config {
-};
diff --git a/src/cpu/amd/socket_C32/socket_C32.c b/src/cpu/amd/socket_C32/socket_C32.c
index 266bfa0..4f90458 100644
--- a/src/cpu/amd/socket_C32/socket_C32.c
+++ b/src/cpu/amd/socket_C32/socket_C32.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_socket_C32_ops = {
 	CHIP_NAME("socket C32")
diff --git a/src/cpu/amd/socket_F/chip.h b/src/cpu/amd/socket_F/chip.h
deleted file mode 100644
index cb582d3..0000000
--- a/src/cpu/amd/socket_F/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_F_config {
-};
diff --git a/src/cpu/amd/socket_F/socket_F.c b/src/cpu/amd/socket_F/socket_F.c
index 93db628..80c3e35 100644
--- a/src/cpu/amd/socket_F/socket_F.c
+++ b/src/cpu/amd/socket_F/socket_F.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_socket_F_ops = {
 	CHIP_NAME("Socket F CPU")
diff --git a/src/cpu/amd/socket_F_1207/chip.h b/src/cpu/amd/socket_F_1207/chip.h
deleted file mode 100644
index 3f7d824..0000000
--- a/src/cpu/amd/socket_F_1207/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_amd_socket_F_1207_config {
-};
diff --git a/src/cpu/amd/socket_F_1207/socket_F_1207.c b/src/cpu/amd/socket_F_1207/socket_F_1207.c
index a95e8ea..e84f435 100644
--- a/src/cpu/amd/socket_F_1207/socket_F_1207.c
+++ b/src/cpu/amd/socket_F_1207/socket_F_1207.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_socket_F_1207_ops = {
 	CHIP_NAME("socket F_1207")
diff --git a/src/cpu/amd/socket_S1G1/chip.h b/src/cpu/amd/socket_S1G1/chip.h
deleted file mode 100644
index 3109da2..0000000
--- a/src/cpu/amd/socket_S1G1/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_amd_socket_S1G1_config {
-};
diff --git a/src/cpu/amd/socket_S1G1/socket_S1G1.c b/src/cpu/amd/socket_S1G1/socket_S1G1.c
index 352ecc3..0b9702c 100644
--- a/src/cpu/amd/socket_S1G1/socket_S1G1.c
+++ b/src/cpu/amd/socket_S1G1/socket_S1G1.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_amd_socket_S1G1_ops = {
 	CHIP_NAME("Socket S1G1 CPU")
diff --git a/src/cpu/intel/ep80579/chip.h b/src/cpu/intel/ep80579/chip.h
deleted file mode 100644
index 08e7529..0000000
--- a/src/cpu/intel/ep80579/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Arastra, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_intel_ep80579_config {
-};
diff --git a/src/cpu/intel/ep80579/ep80579.c b/src/cpu/intel/ep80579/ep80579.c
index fd964a4..7d6e715 100644
--- a/src/cpu/intel/ep80579/ep80579.c
+++ b/src/cpu/intel/ep80579/ep80579.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_intel_ep80579_ops = {
 	CHIP_NAME("EP80579 CPU")
diff --git a/src/cpu/intel/slot_1/chip.h b/src/cpu/intel/slot_1/chip.h
deleted file mode 100644
index 8650f90..0000000
--- a/src/cpu/intel/slot_1/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Keith Hui <buurin at gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_intel_slot_1_config {
-};
diff --git a/src/cpu/intel/slot_1/slot_1.c b/src/cpu/intel/slot_1/slot_1.c
index 548127f..df48248 100644
--- a/src/cpu/intel/slot_1/slot_1.c
+++ b/src/cpu/intel/slot_1/slot_1.c
@@ -19,7 +19,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_intel_slot_1_ops = {
 	CHIP_NAME("Slot 1 CPU")
diff --git a/src/cpu/intel/slot_2/chip.h b/src/cpu/intel/slot_2/chip.h
deleted file mode 100644
index d7bb2b1..0000000
--- a/src/cpu/intel/slot_2/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_slot_2_config {
-};
diff --git a/src/cpu/intel/slot_2/slot_2.c b/src/cpu/intel/slot_2/slot_2.c
index ddc2f3b..994b25a 100644
--- a/src/cpu/intel/slot_2/slot_2.c
+++ b/src/cpu/intel/slot_2/slot_2.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 
 struct chip_operations cpu_intel_slot_2_ops = {
diff --git a/src/cpu/intel/socket_441/chip.h b/src/cpu/intel/socket_441/chip.h
deleted file mode 100644
index 70c4ac8..0000000
--- a/src/cpu/intel/socket_441/chip.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_intel_socket_441_config {
-};
diff --git a/src/cpu/intel/socket_441/socket_441.c b/src/cpu/intel/socket_441/socket_441.c
index eb57dce..319a402 100644
--- a/src/cpu/intel/socket_441/socket_441.c
+++ b/src/cpu/intel/socket_441/socket_441.c
@@ -18,7 +18,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_intel_socket_441_ops = {
 	CHIP_NAME("Socket 441 CPU")
diff --git a/src/cpu/intel/socket_BGA956/chip.h b/src/cpu/intel/socket_BGA956/chip.h
deleted file mode 100644
index 399200d..0000000
--- a/src/cpu/intel/socket_BGA956/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_BGA956_config {
-};
diff --git a/src/cpu/intel/socket_BGA956/socket_BGA956.c b/src/cpu/intel/socket_BGA956/socket_BGA956.c
index 53667c1..def7cc9 100644
--- a/src/cpu/intel/socket_BGA956/socket_BGA956.c
+++ b/src/cpu/intel/socket_BGA956/socket_BGA956.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_intel_socket_BGA956_ops = {
 	CHIP_NAME("Socket BGA956 CPU")
diff --git a/src/cpu/intel/socket_FC_PGA370/chip.h b/src/cpu/intel/socket_FC_PGA370/chip.h
deleted file mode 100644
index 7148d47..0000000
--- a/src/cpu/intel/socket_FC_PGA370/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Joseph Smith <joe at settoplinux.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct cpu_intel_socket_FC_PGA370_config {
-};
diff --git a/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c b/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c
index e3bca8f..62186f2 100644
--- a/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c
+++ b/src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c
@@ -19,7 +19,6 @@
  */
 
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_intel_socket_FC_PGA370_ops = {
 	CHIP_NAME("(FC)PGA370 CPU")
diff --git a/src/cpu/intel/socket_LGA771/chip.h b/src/cpu/intel/socket_LGA771/chip.h
deleted file mode 100644
index fc51d77..0000000
--- a/src/cpu/intel/socket_LGA771/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_LGA771_config {
-};
diff --git a/src/cpu/intel/socket_LGA771/socket_LGA771.c b/src/cpu/intel/socket_LGA771/socket_LGA771.c
index 21a7dc9..85570ba 100644
--- a/src/cpu/intel/socket_LGA771/socket_LGA771.c
+++ b/src/cpu/intel/socket_LGA771/socket_LGA771.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 
 struct chip_operations cpu_intel_socket_LGA771_ops = {
diff --git a/src/cpu/intel/socket_PGA370/chip.h b/src/cpu/intel/socket_PGA370/chip.h
deleted file mode 100644
index c2c70ec..0000000
--- a/src/cpu/intel/socket_PGA370/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_PGA370_config {
-};
diff --git a/src/cpu/intel/socket_PGA370/socket_PGA370.c b/src/cpu/intel/socket_PGA370/socket_PGA370.c
index fffd983..f7c1c2a 100644
--- a/src/cpu/intel/socket_PGA370/socket_PGA370.c
+++ b/src/cpu/intel/socket_PGA370/socket_PGA370.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_intel_socket_PGA370_ops = {
 	CHIP_NAME("Socket PGA370 CPU")
diff --git a/src/cpu/intel/socket_mFCBGA479/chip.h b/src/cpu/intel/socket_mFCBGA479/chip.h
deleted file mode 100644
index 57e432c..0000000
--- a/src/cpu/intel/socket_mFCBGA479/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mFCBGA479_config {
-};
diff --git a/src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c b/src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c
index 4c0bc72..02849b9 100644
--- a/src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c
+++ b/src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_intel_socket_mFCBGA479_ops = {
 	CHIP_NAME("Micro-FCBGA 479 CPU")
diff --git a/src/cpu/intel/socket_mFCPGA478/chip.h b/src/cpu/intel/socket_mFCPGA478/chip.h
deleted file mode 100644
index 50268f5..0000000
--- a/src/cpu/intel/socket_mFCPGA478/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mFCPGA478_config {
-};
diff --git a/src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c b/src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c
index 117a929..5b001bd 100644
--- a/src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c
+++ b/src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 
 struct chip_operations cpu_intel_socket_mFCPGA478_ops = {
diff --git a/src/cpu/intel/socket_mPGA478/chip.h b/src/cpu/intel/socket_mPGA478/chip.h
deleted file mode 100644
index 3dafc9a..0000000
--- a/src/cpu/intel/socket_mPGA478/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mPGA478_config {
-};
diff --git a/src/cpu/intel/socket_mPGA478/socket_mPGA478.c b/src/cpu/intel/socket_mPGA478/socket_mPGA478.c
index da32966..4480bde 100644
--- a/src/cpu/intel/socket_mPGA478/socket_mPGA478.c
+++ b/src/cpu/intel/socket_mPGA478/socket_mPGA478.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 
 struct chip_operations cpu_intel_socket_mPGA478_ops = {
diff --git a/src/cpu/intel/socket_mPGA479M/chip.h b/src/cpu/intel/socket_mPGA479M/chip.h
deleted file mode 100644
index c0c5cd4..0000000
--- a/src/cpu/intel/socket_mPGA479M/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mPGA479M_config {
-};
diff --git a/src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c b/src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c
index de824b5..b151c47 100644
--- a/src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c
+++ b/src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 
 struct chip_operations cpu_intel_socket_mPGA479M_ops = {
diff --git a/src/cpu/intel/socket_mPGA603/chip.h b/src/cpu/intel/socket_mPGA603/chip.h
deleted file mode 100644
index b39982a..0000000
--- a/src/cpu/intel/socket_mPGA603/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mPGA603_config {
-};
diff --git a/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c b/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c
index 2436f96..f5f8e5b 100644
--- a/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c
+++ b/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 
 struct chip_operations cpu_intel_socket_mPGA603_ops = {
diff --git a/src/cpu/intel/socket_mPGA604/chip.h b/src/cpu/intel/socket_mPGA604/chip.h
deleted file mode 100644
index 3a09b82..0000000
--- a/src/cpu/intel/socket_mPGA604/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_mPGA604_config {
-};
diff --git a/src/cpu/intel/socket_mPGA604/socket_mPGA604.c b/src/cpu/intel/socket_mPGA604/socket_mPGA604.c
index df372b2..74bdc0d 100644
--- a/src/cpu/intel/socket_mPGA604/socket_mPGA604.c
+++ b/src/cpu/intel/socket_mPGA604/socket_mPGA604.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 
 struct chip_operations cpu_intel_socket_mPGA604_ops = {
diff --git a/src/cpu/intel/socket_rPGA989/chip.h b/src/cpu/intel/socket_rPGA989/chip.h
deleted file mode 100644
index ee3b396..0000000
--- a/src/cpu/intel/socket_rPGA989/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct cpu_intel_socket_rPGA989_config {
-};
diff --git a/src/cpu/intel/socket_rPGA989/socket_rPGA989.c b/src/cpu/intel/socket_rPGA989/socket_rPGA989.c
index 2484571..6e05b57 100644
--- a/src/cpu/intel/socket_rPGA989/socket_rPGA989.c
+++ b/src/cpu/intel/socket_rPGA989/socket_rPGA989.c
@@ -1,5 +1,4 @@
 #include <device/device.h>
-#include "chip.h"
 
 struct chip_operations cpu_intel_socket_rPGA989_ops = {
 	CHIP_NAME("Socket rPGA989 CPU")
diff --git a/src/drivers/generic/debug/chip.h b/src/drivers/generic/debug/chip.h
deleted file mode 100644
index 661fd54..0000000
--- a/src/drivers/generic/debug/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_generic_debug_config {
-};
diff --git a/src/drivers/generic/debug/debug_dev.c b/src/drivers/generic/debug/debug_dev.c
index 60d610f..57f8077 100644
--- a/src/drivers/generic/debug/debug_dev.c
+++ b/src/drivers/generic/debug/debug_dev.c
@@ -7,7 +7,6 @@
 #include <cpu/x86/msr.h>
 #include <reset.h>
 #include <delay.h>
-#include "chip.h"
 
 static void print_pci_regs(struct device *dev)
 {
diff --git a/src/drivers/i2c/adm1026/adm1026.c b/src/drivers/i2c/adm1026/adm1026.c
index 5b06629..ab85eb5 100644
--- a/src/drivers/i2c/adm1026/adm1026.c
+++ b/src/drivers/i2c/adm1026/adm1026.c
@@ -5,7 +5,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <cpu/x86/msr.h>
-#include "chip.h"
 
 #define ADM1026_DEVICE 0x2d	/* Either 0x2c or 0x2d or 0x2e */
 #define ADM1026_REG_CONFIG1 0x00
diff --git a/src/drivers/i2c/adm1026/chip.h b/src/drivers/i2c/adm1026/chip.h
deleted file mode 100644
index f8324ad..0000000
--- a/src/drivers/i2c/adm1026/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_adm1026_config {
-};
diff --git a/src/drivers/i2c/adm1027/adm1027.c b/src/drivers/i2c/adm1027/adm1027.c
index e97ec69..e83f2c4 100644
--- a/src/drivers/i2c/adm1027/adm1027.c
+++ b/src/drivers/i2c/adm1027/adm1027.c
@@ -5,7 +5,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <cpu/x86/msr.h>
-#include "chip.h"
 
 #define ADM1027_REG_CONFIG1	0x40
 #define CFG1_STRT		0x01
diff --git a/src/drivers/i2c/adm1027/chip.h b/src/drivers/i2c/adm1027/chip.h
deleted file mode 100644
index 8836817..0000000
--- a/src/drivers/i2c/adm1027/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_adm1027_config {
-};
diff --git a/src/drivers/i2c/adt7463/adt7463.c b/src/drivers/i2c/adt7463/adt7463.c
index 3967bf7..a791fb4 100644
--- a/src/drivers/i2c/adt7463/adt7463.c
+++ b/src/drivers/i2c/adt7463/adt7463.c
@@ -23,7 +23,6 @@
 #include <device/device.h>
 #include <console/console.h>
 #include <device/smbus.h>
-#include "chip.h"
 
 /**
  * Do some S2881-specific HWM initialization for the ADT7463 chip.
diff --git a/src/drivers/i2c/adt7463/chip.h b/src/drivers/i2c/adt7463/chip.h
deleted file mode 100644
index 351d548..0000000
--- a/src/drivers/i2c/adt7463/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_adt7463_config {
-};
diff --git a/src/drivers/i2c/i2cmux/chip.h b/src/drivers/i2c/i2cmux/chip.h
deleted file mode 100644
index 0cfd837..0000000
--- a/src/drivers/i2c/i2cmux/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_i2cmux_config {
-};
diff --git a/src/drivers/i2c/i2cmux/i2cmux.c b/src/drivers/i2c/i2cmux/i2cmux.c
index 44bf390..b318508 100644
--- a/src/drivers/i2c/i2cmux/i2cmux.c
+++ b/src/drivers/i2c/i2cmux/i2cmux.c
@@ -5,7 +5,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <cpu/x86/msr.h>
-#include "chip.h"
 
 static void i2cmux_set_link(device_t dev, unsigned int link)
 {
diff --git a/src/drivers/i2c/i2cmux2/chip.h b/src/drivers/i2c/i2cmux2/chip.h
deleted file mode 100644
index dafa1d7..0000000
--- a/src/drivers/i2c/i2cmux2/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_i2cmux2_config {
-};
diff --git a/src/drivers/i2c/i2cmux2/i2cmux2.c b/src/drivers/i2c/i2cmux2/i2cmux2.c
index dc8ec25..a7d40e2 100644
--- a/src/drivers/i2c/i2cmux2/i2cmux2.c
+++ b/src/drivers/i2c/i2cmux2/i2cmux2.c
@@ -5,7 +5,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <cpu/x86/msr.h>
-#include "chip.h"
 
 static void i2cmux2_set_link(device_t dev, unsigned int link)
 {
diff --git a/src/drivers/i2c/lm63/chip.h b/src/drivers/i2c/lm63/chip.h
deleted file mode 100644
index 1c5bc7a..0000000
--- a/src/drivers/i2c/lm63/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_lm63_config {
-};
diff --git a/src/drivers/i2c/lm63/lm63.c b/src/drivers/i2c/lm63/lm63.c
index d98a245..47a5489 100644
--- a/src/drivers/i2c/lm63/lm63.c
+++ b/src/drivers/i2c/lm63/lm63.c
@@ -5,7 +5,6 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <cpu/x86/msr.h>
-#include "chip.h"
 
 static void lm63_init(device_t dev)
 {
diff --git a/src/drivers/i2c/w83795/chip.h b/src/drivers/i2c/w83795/chip.h
deleted file mode 100644
index b5162c1..0000000
--- a/src/drivers/i2c/w83795/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct drivers_i2c_w83795_config {
-};
diff --git a/src/mainboard/emulation/qemu-x86/chip.h b/src/mainboard/emulation/qemu-x86/chip.h
deleted file mode 100644
index 0aa8173..0000000
--- a/src/mainboard/emulation/qemu-x86/chip.h
+++ /dev/null
@@ -1,2 +0,0 @@
-struct mainboard_emulation_qemu_x86_config {};
-
diff --git a/src/mainboard/emulation/qemu-x86/northbridge.c b/src/mainboard/emulation/qemu-x86/northbridge.c
index f1669bb..6103229 100644
--- a/src/mainboard/emulation/qemu-x86/northbridge.c
+++ b/src/mainboard/emulation/qemu-x86/northbridge.c
@@ -8,7 +8,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
-#include "chip.h"
 #include <delay.h>
 #include <smbios.h>
 
diff --git a/src/northbridge/amd/agesa/family10/chip.h b/src/northbridge/amd/agesa/family10/chip.h
deleted file mode 100644
index f95d5b1..0000000
--- a/src/northbridge/amd/agesa/family10/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family10_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 4b3859b..ddb7619 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -39,10 +39,8 @@
 #include <Porting.h>
 #include <AGESA.h>
 #include <Options.h>
-#include "root_complex/chip.h"
 #include "northbridge.h"
 #include "amdfam10.h"
-#include "chip.h"
 
 extern uint32_t agesawrapper_amdinitmid(void);
 
diff --git a/src/northbridge/amd/agesa/family10/root_complex/chip.h b/src/northbridge/amd/agesa/family10/root_complex/chip.h
deleted file mode 100644
index 80adb8e..0000000
--- a/src/northbridge/amd/agesa/family10/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family10_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family12/chip.h b/src/northbridge/amd/agesa/family12/chip.h
deleted file mode 100644
index 39efd52..0000000
--- a/src/northbridge/amd/agesa/family12/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family12_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 6689e71..b24681b 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -33,7 +33,6 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/amd/mtrr.h>
 
-#include "chip.h"
 #include "northbridge.h"
 #include "SbEarly.h"
 #include "agesawrapper.h"
diff --git a/src/northbridge/amd/agesa/family12/root_complex/chip.h b/src/northbridge/amd/agesa/family12/root_complex/chip.h
deleted file mode 100644
index 556f343..0000000
--- a/src/northbridge/amd/agesa/family12/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family12_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family14/chip.h b/src/northbridge/amd/agesa/family14/chip.h
deleted file mode 100644
index 46ea78a..0000000
--- a/src/northbridge/amd/agesa/family14/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family14_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 875dbbb..a635901 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -34,7 +34,6 @@
 #include <cpu/amd/mtrr.h>
 
 #include "agesawrapper.h"
-#include "chip.h"
 #include "northbridge.h"
 #if CONFIG_AMD_SB_CIMX
 #include <sb_cimx.h>
diff --git a/src/northbridge/amd/agesa/family14/root_complex/chip.h b/src/northbridge/amd/agesa/family14/root_complex/chip.h
deleted file mode 100644
index cf95179..0000000
--- a/src/northbridge/amd/agesa/family14/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family14_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family15/chip.h b/src/northbridge/amd/agesa/family15/chip.h
deleted file mode 100644
index b06318b..0000000
--- a/src/northbridge/amd/agesa/family15/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family15_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index 96cfca2..253ae1c 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -40,9 +40,7 @@
 #include <cpu/amd/amdfam15.h>
 #include <cpuRegisters.h>
 #include "agesawrapper.h"
-#include "root_complex/chip.h"
 #include "northbridge.h"
-#include "chip.h"
 
 #define MAX_NODE_NUMS (MAX_NODES * MAX_DIES)
 
diff --git a/src/northbridge/amd/agesa/family15/root_complex/chip.h b/src/northbridge/amd/agesa/family15/root_complex/chip.h
deleted file mode 100644
index 8f670f6..0000000
--- a/src/northbridge/amd/agesa/family15/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family15_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family15tn/chip.h b/src/northbridge/amd/agesa/family15tn/chip.h
deleted file mode 100644
index 091de82..0000000
--- a/src/northbridge/amd/agesa/family15tn/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family15tn_config
-{
-};
-
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index fb30277..67550eb 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -40,9 +40,7 @@
 #include <cpu/amd/amdfam15.h>
 #include <cpuRegisters.h>
 #include "agesawrapper.h"
-#include "root_complex/chip.h"
 #include "northbridge.h"
-#include "chip.h"
 
 #define MAX_NODE_NUMS (MAX_NODES * MAX_DIES)
 
diff --git a/src/northbridge/amd/agesa/family15tn/root_complex/chip.h b/src/northbridge/amd/agesa/family15tn/root_complex/chip.h
deleted file mode 100644
index 0306fdd..0000000
--- a/src/northbridge/amd/agesa/family15tn/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_agesa_family15tn_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/amdfam10/chip.h b/src/northbridge/amd/amdfam10/chip.h
deleted file mode 100644
index a8161cb..0000000
--- a/src/northbridge/amd/amdfam10/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_amdfam10_config
-{
-};
-
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 865a3bc..f035d3a 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -37,8 +37,6 @@
 #include <pc80/mc146818rtc.h>
 #endif
 
-#include "chip.h"
-#include "root_complex/chip.h"
 #include "northbridge.h"
 
 #include "amdfam10.h"
diff --git a/src/northbridge/amd/amdfam10/root_complex/chip.h b/src/northbridge/amd/amdfam10/root_complex/chip.h
deleted file mode 100644
index 8c93020..0000000
--- a/src/northbridge/amd/amdfam10/root_complex/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_amdfam10_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/amdk8/chip.h b/src/northbridge/amd/amdk8/chip.h
deleted file mode 100644
index a2331f4..0000000
--- a/src/northbridge/amd/amdk8/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_amd_amdk8_config
-{
-};
-
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index d94ee9a..ff7e030 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -25,8 +25,6 @@
 #include <pc80/mc146818rtc.h>
 #endif
 
-#include "chip.h"
-#include "root_complex/chip.h"
 #include "northbridge.h"
 
 #include "amdk8.h"
diff --git a/src/northbridge/amd/amdk8/root_complex/chip.h b/src/northbridge/amd/amdk8/root_complex/chip.h
deleted file mode 100644
index a9b6b5b..0000000
--- a/src/northbridge/amd/amdk8/root_complex/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_amd_amdk8_root_complex_config
-{
-};
-
diff --git a/src/northbridge/amd/gx1/chip.h b/src/northbridge/amd/gx1/chip.h
deleted file mode 100644
index 0378b61..0000000
--- a/src/northbridge/amd/gx1/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_amd_gx1_config
-{
-};
-
diff --git a/src/northbridge/amd/gx1/northbridge.c b/src/northbridge/amd/gx1/northbridge.c
index 5c59f73..fbea3b5 100644
--- a/src/northbridge/amd/gx1/northbridge.c
+++ b/src/northbridge/amd/gx1/northbridge.c
@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
-#include "chip.h"
 #include "northbridge.h"
 #include <cpu/amd/gx1def.h>
 #include <cpu/x86/cache.h>
diff --git a/src/northbridge/amd/gx2/chip.h b/src/northbridge/amd/gx2/chip.h
deleted file mode 100644
index 1e266c6..0000000
--- a/src/northbridge/amd/gx2/chip.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_gx2_config
-{
-
-};
-
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c
index 8da37b4..12096d8 100644
--- a/src/northbridge/amd/gx2/northbridge.c
+++ b/src/northbridge/amd/gx2/northbridge.c
@@ -27,7 +27,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
-#include "chip.h"
 #include "northbridge.h"
 #include <cpu/x86/msr.h>
 #include <cpu/x86/cache.h>
diff --git a/src/northbridge/amd/gx2/northbridgeinit.c b/src/northbridge/amd/gx2/northbridgeinit.c
index 37fcf7e..f51bcc6 100644
--- a/src/northbridge/amd/gx2/northbridgeinit.c
+++ b/src/northbridge/amd/gx2/northbridgeinit.c
@@ -27,7 +27,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
-#include "chip.h"
 #include "northbridge.h"
 #include <cpu/amd/gx2def.h>
 #include <cpu/x86/msr.h>
diff --git a/src/northbridge/amd/lx/chip.h b/src/northbridge/amd/lx/chip.h
deleted file mode 100644
index 12b50fb..0000000
--- a/src/northbridge/amd/lx/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_amd_lx_config {
-};
-
diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c
index 9ceceb8..5f98b40 100644
--- a/src/northbridge/amd/lx/northbridge.c
+++ b/src/northbridge/amd/lx/northbridge.c
@@ -33,7 +33,6 @@
 #include <cpu/x86/cache.h>
 #include <cpu/amd/vr.h>
 #include <cpu/cpu.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "../../../southbridge/amd/cs5536/cs5536.h"
 
diff --git a/src/northbridge/amd/lx/northbridgeinit.c b/src/northbridge/amd/lx/northbridgeinit.c
index 54cc057..6288608 100644
--- a/src/northbridge/amd/lx/northbridgeinit.c
+++ b/src/northbridge/amd/lx/northbridgeinit.c
@@ -27,7 +27,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
-#include "chip.h"
 #include "northbridge.h"
 #include <cpu/amd/lxdef.h>
 #include <cpu/x86/msr.h>
diff --git a/src/northbridge/intel/e7501/chip.h b/src/northbridge/intel/e7501/chip.h
deleted file mode 100644
index 112c03c..0000000
--- a/src/northbridge/intel/e7501/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_intel_e7501_config
-{
-};
-
diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index 1fa77d7..c70f032 100644
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
-#include "chip.h"
 
 #if CONFIG_WRITE_HIGH_TABLES
 #include <cbmem.h>
diff --git a/src/northbridge/intel/e7505/chip.h b/src/northbridge/intel/e7505/chip.h
deleted file mode 100644
index 8fd3cdc..0000000
--- a/src/northbridge/intel/e7505/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_intel_e7505_config
-{
-};
-
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index 9046f43..b6d24fa 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
-#include "chip.h"
 #include "e7505.h"
 
 #if CONFIG_WRITE_HIGH_TABLES
diff --git a/src/northbridge/intel/i440bx/chip.h b/src/northbridge/intel/i440bx/chip.h
deleted file mode 100644
index 15ecb4d..0000000
--- a/src/northbridge/intel/i440bx/chip.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe at hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_intel_i440bx_config
-{
-};
-
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 18e5716..39bd6b9 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -9,7 +9,6 @@
 #include <bitops.h>
 #include <cpu/cpu.h>
 #include <pc80/keyboard.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "i440bx.h"
 
diff --git a/src/northbridge/intel/i440lx/chip.h b/src/northbridge/intel/i440lx/chip.h
deleted file mode 100644
index 19a9b26..0000000
--- a/src/northbridge/intel/i440lx/chip.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 Maciej Pijanka <maciej.pijanka at gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_intel_i440lx_config
-{
-};
-
diff --git a/src/northbridge/intel/i440lx/northbridge.c b/src/northbridge/intel/i440lx/northbridge.c
index f34b5ab..57fcfcb 100644
--- a/src/northbridge/intel/i440lx/northbridge.c
+++ b/src/northbridge/intel/i440lx/northbridge.c
@@ -30,7 +30,6 @@
 #include <bitops.h>
 #include <cpu/cpu.h>
 #include <pc80/keyboard.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "i440lx.h"
 
diff --git a/src/northbridge/intel/i5000/chip.h b/src/northbridge/intel/i5000/chip.h
deleted file mode 100644
index 214ffcf..0000000
--- a/src/northbridge/intel/i5000/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Sven Schnelle <svens at stackframe.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_intel_i5000_config {
-};
-
diff --git a/src/northbridge/intel/i5000/northbridge.c b/src/northbridge/intel/i5000/northbridge.c
index ea3665c..1548f19 100644
--- a/src/northbridge/intel/i5000/northbridge.c
+++ b/src/northbridge/intel/i5000/northbridge.c
@@ -29,7 +29,6 @@
 #include <cpu/cpu.h>
 #include <arch/acpi.h>
 #include <cbmem.h>
-#include "chip.h"
 #if CONFIG_WRITE_HIGH_TABLES
 #include <cbmem.h>
 #endif
diff --git a/src/northbridge/intel/i82810/chip.h b/src/northbridge/intel/i82810/chip.h
deleted file mode 100644
index c571677..0000000
--- a/src/northbridge/intel/i82810/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey.osgood at gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_intel_i82810_config {
-};
-
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index 5c51b9a..4c09d44 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -29,7 +29,6 @@
 #include <string.h>
 #include <bitops.h>
 #include <cpu/cpu.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "i82810.h"
 
diff --git a/src/northbridge/intel/i82830/chip.h b/src/northbridge/intel/i82830/chip.h
deleted file mode 100644
index d0360fe..0000000
--- a/src/northbridge/intel/i82830/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Joseph Smith <joe at smittys.pointclark.net>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_intel_i82830_config {
-};
-
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index f3341d4..95ac2ed 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -28,7 +28,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
-#include "chip.h"
 #include "i82830.h"
 
 static void northbridge_init(device_t dev)
diff --git a/src/northbridge/intel/i855/chip.h b/src/northbridge/intel/i855/chip.h
deleted file mode 100644
index 40b1d38..0000000
--- a/src/northbridge/intel/i855/chip.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Jon Dufresne <jon.dufresne at gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_intel_i855_config
-{
-};
-
diff --git a/src/northbridge/intel/i855/northbridge.c b/src/northbridge/intel/i855/northbridge.c
index b59ba50..74e2c76 100644
--- a/src/northbridge/intel/i855/northbridge.c
+++ b/src/northbridge/intel/i855/northbridge.c
@@ -31,7 +31,6 @@
 #include <bitops.h>
 #include <cpu/x86/cache.h>
 #include <cpu/cpu.h>
-#include "chip.h"
 
 static void northbridge_init(device_t dev)
 {
diff --git a/src/northbridge/intel/i945/chip.h b/src/northbridge/intel/i945/chip.h
deleted file mode 100644
index 2deb985..0000000
--- a/src/northbridge/intel/i945/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2008 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_intel_i945_config {
-};
-
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 41b15cf..684bb71 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -29,7 +29,6 @@
 #include <bitops.h>
 #include <cpu/cpu.h>
 #include <arch/acpi.h>
-#include "chip.h"
 #include "i945.h"
 
 static int get_pcie_bar(u32 *base, u32 *len)
diff --git a/src/northbridge/intel/sch/chip.h b/src/northbridge/intel/sch/chip.h
deleted file mode 100644
index b3aebd3..0000000
--- a/src/northbridge/intel/sch/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2010 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_intel_sch_config {
-};
-
diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index 48556e2..16ada2f 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -29,7 +29,6 @@
 #include <bitops.h>
 #include <cpu/cpu.h>
 #include <arch/acpi.h>
-#include "chip.h"
 #include "sch.h"
 
 static int get_pcie_bar(u32 *base, u32 *len)
diff --git a/src/northbridge/rdc/r8610/chip.h b/src/northbridge/rdc/r8610/chip.h
deleted file mode 100644
index 150f032..0000000
--- a/src/northbridge/rdc/r8610/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey.osgood at gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_rdc_r8610_config {
-};
-
diff --git a/src/northbridge/rdc/r8610/northbridge.c b/src/northbridge/rdc/r8610/northbridge.c
index 250ace0..65fd5eb 100644
--- a/src/northbridge/rdc/r8610/northbridge.c
+++ b/src/northbridge/rdc/r8610/northbridge.c
@@ -30,7 +30,6 @@
 #include <string.h>
 #include <bitops.h>
 #include <smbios.h>
-#include "chip.h"
 
 #if CONFIG_WRITE_HIGH_TABLES
 #include <cbmem.h>
diff --git a/src/northbridge/via/cn400/agp.c b/src/northbridge/via/cn400/agp.c
index a302759..f6dbc69 100644
--- a/src/northbridge/via/cn400/agp.c
+++ b/src/northbridge/via/cn400/agp.c
@@ -24,7 +24,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "cn400.h"
 
diff --git a/src/northbridge/via/cn400/chip.h b/src/northbridge/via/cn400/chip.h
deleted file mode 100644
index e403d35..0000000
--- a/src/northbridge/via/cn400/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey.osgood at gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_via_cn400_config {
-};
-
diff --git a/src/northbridge/via/cn400/northbridge.c b/src/northbridge/via/cn400/northbridge.c
index 74e0edf..61d7345 100644
--- a/src/northbridge/via/cn400/northbridge.c
+++ b/src/northbridge/via/cn400/northbridge.c
@@ -30,7 +30,6 @@
 #include <string.h>
 #include <bitops.h>
 #include <cpu/cpu.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "cn400.h"
 
diff --git a/src/northbridge/via/cn400/vga.c b/src/northbridge/via/cn400/vga.c
index 7641a81..8c75a4f 100644
--- a/src/northbridge/via/cn400/vga.c
+++ b/src/northbridge/via/cn400/vga.c
@@ -34,7 +34,6 @@
 #include <bitops.h>
 #include <cpu/cpu.h>
 #include <arch/interrupt.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "cn400.h"
 
diff --git a/src/northbridge/via/cn400/vlink.c b/src/northbridge/via/cn400/vlink.c
index dc574c1..85a0fc6 100644
--- a/src/northbridge/via/cn400/vlink.c
+++ b/src/northbridge/via/cn400/vlink.c
@@ -22,7 +22,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "cn400.h"
 
diff --git a/src/northbridge/via/cn700/agp.c b/src/northbridge/via/cn700/agp.c
index 327fac4..ba84f79 100644
--- a/src/northbridge/via/cn700/agp.c
+++ b/src/northbridge/via/cn700/agp.c
@@ -24,7 +24,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "cn700.h"
 
diff --git a/src/northbridge/via/cn700/chip.h b/src/northbridge/via/cn700/chip.h
deleted file mode 100644
index 5b1515d..0000000
--- a/src/northbridge/via/cn700/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey.osgood at gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_via_cn700_config {
-};
-
diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c
index ced4c2f..837ec85 100644
--- a/src/northbridge/via/cn700/northbridge.c
+++ b/src/northbridge/via/cn700/northbridge.c
@@ -30,7 +30,6 @@
 #include <string.h>
 #include <bitops.h>
 #include <cpu/cpu.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "cn700.h"
 
diff --git a/src/northbridge/via/cn700/vga.c b/src/northbridge/via/cn700/vga.c
index 33d1fe0..d184644 100644
--- a/src/northbridge/via/cn700/vga.c
+++ b/src/northbridge/via/cn700/vga.c
@@ -34,7 +34,6 @@
 #include <bitops.h>
 #include <cpu/cpu.h>
 #include <arch/interrupt.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "cn700.h"
 
diff --git a/src/northbridge/via/cx700/chip.h b/src/northbridge/via/cx700/chip.h
deleted file mode 100644
index 0e8491b..0000000
--- a/src/northbridge/via/cx700/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_via_cx700_config {
-};
-
diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c
index 4fca723..1df9ce0 100644
--- a/src/northbridge/via/cx700/northbridge.c
+++ b/src/northbridge/via/cx700/northbridge.c
@@ -29,7 +29,6 @@
 #include <bitops.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/mtrr.h>
-#include "chip.h"
 #include "northbridge.h"
 
 #if CONFIG_WRITE_HIGH_TABLES
diff --git a/src/northbridge/via/cx700/vga.c b/src/northbridge/via/cx700/vga.c
index 91dd864..821edc4 100644
--- a/src/northbridge/via/cx700/vga.c
+++ b/src/northbridge/via/cx700/vga.c
@@ -31,7 +31,6 @@
 #include <cpu/x86/msr.h>
 #include <arch/interrupt.h>
 #include "registers.h"
-#include "chip.h"
 #include "northbridge.h"
 
 /* PCI Domain 1 Device 0 Function 0 */
diff --git a/src/northbridge/via/vt8601/chip.h b/src/northbridge/via/vt8601/chip.h
deleted file mode 100644
index c65e12e..0000000
--- a/src/northbridge/via/vt8601/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_via_vt8601_config
-{
-};
-
diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c
index 92adf32..f5f084c 100644
--- a/src/northbridge/via/vt8601/northbridge.c
+++ b/src/northbridge/via/vt8601/northbridge.c
@@ -9,7 +9,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <bitops.h>
-#include "chip.h"
 #include "northbridge.h"
 
 /*
diff --git a/src/northbridge/via/vt8623/chip.h b/src/northbridge/via/vt8623/chip.h
deleted file mode 100644
index 5fb3f80..0000000
--- a/src/northbridge/via/vt8623/chip.h
+++ /dev/null
@@ -1,4 +0,0 @@
-struct northbridge_via_vt8623_config
-{
-};
-
diff --git a/src/northbridge/via/vt8623/northbridge.c b/src/northbridge/via/vt8623/northbridge.c
index 5ea2212..76cd7a0 100644
--- a/src/northbridge/via/vt8623/northbridge.c
+++ b/src/northbridge/via/vt8623/northbridge.c
@@ -11,7 +11,6 @@
 #include <cpu/cpu.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
-#include "chip.h"
 #include "northbridge.h"
 
 /*
diff --git a/src/northbridge/via/vt8623/vga.c b/src/northbridge/via/vt8623/vga.c
index 933c733..20857a6 100644
--- a/src/northbridge/via/vt8623/vga.c
+++ b/src/northbridge/via/vt8623/vga.c
@@ -30,7 +30,6 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
 #include <arch/interrupt.h>
-#include "chip.h"
 #include "northbridge.h"
 
 static int via_vt8623_int15_handler(struct eregs *regs)
diff --git a/src/northbridge/via/vx800/chip.h b/src/northbridge/via/vx800/chip.h
deleted file mode 100644
index 64df31a..0000000
--- a/src/northbridge/via/vx800/chip.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 One Laptop per Child, Association, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-struct northbridge_via_vx800_config {
-};
-
diff --git a/src/northbridge/via/vx800/ide.c b/src/northbridge/via/vx800/ide.c
index 9fa8f35..4ed4879 100644
--- a/src/northbridge/via/vx800/ide.c
+++ b/src/northbridge/via/vx800/ide.c
@@ -22,7 +22,6 @@
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <console/console.h>
-#include "chip.h"
 #include <arch/io.h>
 #include "vx800.h"
 
@@ -191,10 +190,6 @@ static void ide_init(struct device *dev)
 	pci_write_config8(dev, PCI_INTERRUPT_PIN, 0x0);
 	pci_write_config8(dev, PCI_INTERRUPT_LINE, 0xff);
 #if 0
-
-	struct southbridge_via_vt8237r_config *sb =
-	    (struct southbridge_via_vt8237r_config *)dev->chip_info;
-
 	u8 enables;
 	u32 cablesel;
 
diff --git a/src/northbridge/via/vx800/lpc.c b/src/northbridge/via/vx800/lpc.c
index b9941d1..b5cd5a3 100644
--- a/src/northbridge/via/vx800/lpc.c
+++ b/src/northbridge/via/vx800/lpc.c
@@ -28,7 +28,6 @@
 #include <pc80/keyboard.h>
 #include <pc80/i8259.h>
 #include "vx800.h"
-#include "chip.h"
 
 static const unsigned char pciIrqs[4] = { 0xa, 0x9, 0xb, 0xa };
 
diff --git a/src/northbridge/via/vx800/northbridge.c b/src/northbridge/via/vx800/northbridge.c
index f3cfa41..6274e23 100644
--- a/src/northbridge/via/vx800/northbridge.c
+++ b/src/northbridge/via/vx800/northbridge.c
@@ -31,7 +31,6 @@
 #include <string.h>
 #include <bitops.h>
 #include <cpu/cpu.h>
-#include "chip.h"
 #include "northbridge.h"
 #include "vx800.h"
 
diff --git a/src/northbridge/via/vx800/vga.c b/src/northbridge/via/vx800/vga.c
index e438012..bb7de9e 100644
--- a/src/northbridge/via/vx800/vga.c
+++ b/src/northbridge/via/vx800/vga.c
@@ -33,7 +33,6 @@
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
 #include <arch/interrupt.h>
-#include "chip.h"
 #include "northbridge.h"
 
 /* PCI Domain 1 Device 0 Function 0 */
diff --git a/src/southbridge/amd/cimx/sb700/chip_name.c b/src/southbridge/amd/cimx/sb700/chip_name.c
deleted file mode 100644
index 13d2276..0000000
--- a/src/southbridge/amd/cimx/sb700/chip_name.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <device/device.h>
-#include "chip.h"
-
-struct chip_operations southbridge_amd_cimx_sb700_ops = {
-	CHIP_NAME("AMD South Bridge  SB700")
-};
diff --git a/src/southbridge/amd/cimx/sb800/chip_name.c b/src/southbridge/amd/cimx/sb800/chip_name.c
deleted file mode 100644
index 9ce89d6..0000000
--- a/src/southbridge/amd/cimx/sb800/chip_name.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <device/device.h>
-#include "chip.h"
-
-struct chip_operations southbridge_amd_cimx_sb800_ops = {
-	CHIP_NAME("AMD South Bridge  SB800")
-};
diff --git a/src/southbridge/amd/cimx/sb900/chip_name.c b/src/southbridge/amd/cimx/sb900/chip_name.c
deleted file mode 100644
index dd875dc..0000000
--- a/src/southbridge/amd/cimx/sb900/chip_name.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <device/device.h>
-#include "chip.h"
-
-struct chip_operations southbridge_amd_cimx_sb900_ops = {
-	CHIP_NAME("AMD South Bridge  SB900")
-};
diff --git a/src/southbridge/intel/i82801cx/chip.h b/src/southbridge/intel/i82801cx/chip.h
deleted file mode 100644
index 5618521..0000000
--- a/src/southbridge/intel/i82801cx/chip.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef I82801CX_CHIP_H
-#define I82801CX_CHIP_H
-
-struct southbridge_intel_i82801cx_config
-{
-};
-
-#endif /* I82801CX_CHIP_H */
diff --git a/src/southbridge/intel/i82801cx/i82801cx.h b/src/southbridge/intel/i82801cx/i82801cx.h
index da518a3..2842883 100644
--- a/src/southbridge/intel/i82801cx/i82801cx.h
+++ b/src/southbridge/intel/i82801cx/i82801cx.h
@@ -3,7 +3,6 @@
 
 #if !defined(__PRE_RAM__)
 #include <device/device.h>
-#include "chip.h"
 void i82801cx_enable(device_t dev);
 void i82801cx_hard_reset(void);
 #endif
diff --git a/src/southbridge/intel/pxhd/chip.h b/src/southbridge/intel/pxhd/chip.h
deleted file mode 100644
index 27d88a8..0000000
--- a/src/southbridge/intel/pxhd/chip.h
+++ /dev/null
@@ -1,5 +0,0 @@
-struct southbridge_intel_pxhd_config
-{
-	/* nothing */
-};
-
diff --git a/src/southbridge/intel/pxhd/pxhd.h b/src/southbridge/intel/pxhd/pxhd.h
index c3e6ce5..b0e8cdb 100644
--- a/src/southbridge/intel/pxhd/pxhd.h
+++ b/src/southbridge/intel/pxhd/pxhd.h
@@ -1,6 +1,5 @@
 #ifndef PXHD_H
 #define PXHD_H
 
-#include "chip.h"
 
 #endif /* PXHD_H */
diff --git a/src/southbridge/ti/pcixx12/chip.h b/src/southbridge/ti/pcixx12/chip.h
deleted file mode 100644
index 03151a8..0000000
--- a/src/southbridge/ti/pcixx12/chip.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef _SOUTHBRIDGE_TI_PCIXX12
-#define _SOUTHBRIDGE_TI_PCIXX12
-
-struct southbridge_ti_pcixx12_config {
-	int dummy;
-
-};
-
-#endif /* _SOUTHBRIDGE_TI_PCIXX12 */
diff --git a/src/southbridge/ti/pcixx12/pcixx12.c b/src/southbridge/ti/pcixx12/pcixx12.c
index 0ea3b11..5e62292 100644
--- a/src/southbridge/ti/pcixx12/pcixx12.c
+++ b/src/southbridge/ti/pcixx12/pcixx12.c
@@ -24,7 +24,6 @@
 #include <device/pci_ids.h>
 #include <console/console.h>
 #include <device/cardbus.h>
-#include "chip.h"
 
 static void pcixx12_init(device_t dev)
 {
@@ -62,7 +61,6 @@ static const struct pci_driver ti_pcixx12_driver __pci_driver = {
 
 static void southbridge_init(device_t dev)
 {
-	// struct southbridge_ti_pcixx12_config *config = dev->chip_info;
 }
 
 struct chip_operations southbridge_ti_pcixx12_ops = {
diff --git a/src/superio/fintek/f71805f/chip.h b/src/superio/fintek/f71805f/chip.h
deleted file mode 100644
index 603dbee..0000000
--- a/src/superio/fintek/f71805f/chip.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey at slightlyhackish.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_FINTEK_F71805F_CHIP_H
-#define SUPERIO_FINTEK_F71805F_CHIP_H
-
-#include <device/device.h>
-#include <uart8250.h>
-
-/* This chip doesn't have keyboard and mouse support. */
-
-struct superio_fintek_f71805f_config {
-
-};
-
-#endif
diff --git a/src/superio/fintek/f71805f/superio.c b/src/superio/fintek/f71805f/superio.c
index 5f17946..afe5b8c 100644
--- a/src/superio/fintek/f71805f/superio.c
+++ b/src/superio/fintek/f71805f/superio.c
@@ -24,7 +24,6 @@
 #include <console/console.h>
 #include <stdlib.h>
 #include <uart8250.h>
-#include "chip.h"
 #include "f71805f.h"
 
 static void pnp_enter_conf_state(device_t dev)
diff --git a/src/superio/fintek/f71859/chip.h b/src/superio/fintek/f71859/chip.h
deleted file mode 100644
index bd45ac0..0000000
--- a/src/superio/fintek/f71859/chip.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Marc Jones <marcj303 at gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_FINTEK_F71859_CHIP_H
-#define SUPERIO_FINTEK_F71859_CHIP_H
-
-#include <device/device.h>
-#include <uart8250.h>
-
-struct superio_fintek_f71859_config {
-
-};
-
-#endif
diff --git a/src/superio/fintek/f71859/superio.c b/src/superio/fintek/f71859/superio.c
index 809140b..a0158ba 100644
--- a/src/superio/fintek/f71859/superio.c
+++ b/src/superio/fintek/f71859/superio.c
@@ -25,7 +25,6 @@
 #include <console/console.h>
 #include <stdlib.h>
 #include <uart8250.h>
-#include "chip.h"
 #include "f71859.h"
 
 static void pnp_enter_conf_state(device_t dev)
diff --git a/src/superio/intel/i3100/chip.h b/src/superio/intel/i3100/chip.h
deleted file mode 100644
index 05e2f45..0000000
--- a/src/superio/intel/i3100/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Arastra, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_INTEL_I3100_CHIP_H
-#define SUPERIO_INTEL_I3100_CHIP_H
-
-#include <device/device.h>
-#include <uart8250.h>
-
-struct superio_intel_i3100_config {
-};
-
-#endif
diff --git a/src/superio/intel/i3100/superio.c b/src/superio/intel/i3100/superio.c
index 74862eb..b8c107d 100644
--- a/src/superio/intel/i3100/superio.c
+++ b/src/superio/intel/i3100/superio.c
@@ -22,7 +22,6 @@
 #include <device/device.h>
 #include <device/pnp.h>
 #include <uart8250.h>
-#include "chip.h"
 #include "i3100.h"
 #include <arch/io.h>
 
diff --git a/src/superio/ite/it8661f/chip.h b/src/superio/ite/it8661f/chip.h
deleted file mode 100644
index 1d9d1f9..0000000
--- a/src/superio/ite/it8661f/chip.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Uwe Hermann <uwe at hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_ITE_IT8661F_CHIP_H
-#define SUPERIO_ITE_IT8661F_CHIP_H
-
-/* This chip doesn't have keyboard and mouse support. */
-
-#include <device/device.h>
-#include <uart8250.h>
-
-struct superio_ite_it8661f_config {
-
-};
-
-#endif
diff --git a/src/superio/ite/it8661f/superio.c b/src/superio/ite/it8661f/superio.c
index fcf54e7..a348a7f 100644
--- a/src/superio/ite/it8661f/superio.c
+++ b/src/superio/ite/it8661f/superio.c
@@ -22,7 +22,6 @@
 #include <device/pnp.h>
 #include <uart8250.h>
 #include <stdlib.h>
-#include "chip.h"
 #include "it8661f.h"
 
 /* TODO: Add pnp_enter_ext_func_mode() etc. and wrap functions. */
diff --git a/src/superio/ite/it8705f/chip.h b/src/superio/ite/it8705f/chip.h
deleted file mode 100644
index ac2ba77..0000000
--- a/src/superio/ite/it8705f/chip.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Uwe Hermann <uwe at hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_ITE_IT8705F_CHIP_H
-#define SUPERIO_ITE_IT8705F_CHIP_H
-
-/* This chip doesn't have keyboard and mouse support. */
-
-#include <device/device.h>
-#include <uart8250.h>
-
-struct superio_ite_it8705f_config {
-
-};
-
-#endif
diff --git a/src/superio/ite/it8705f/superio.c b/src/superio/ite/it8705f/superio.c
index 8f14a34..8992ea2 100644
--- a/src/superio/ite/it8705f/superio.c
+++ b/src/superio/ite/it8705f/superio.c
@@ -22,13 +22,10 @@
 #include <device/pnp.h>
 #include <uart8250.h>
 #include <stdlib.h>
-#include "chip.h"
 #include "it8705f.h"
 
 static void init(device_t dev)
 {
-	struct superio_ite_it8705f_config *conf = dev->chip_info;
-
 	if (!dev->enabled)
 		return;
 
diff --git a/src/superio/nsc/pc87382/chip.h b/src/superio/nsc/pc87382/chip.h
deleted file mode 100644
index a9f0200..0000000
--- a/src/superio/nsc/pc87382/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Sven Schnelle <svens at stackframe.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_NSC_PC87382_CHIP_H
-#define SUPERIO_NSC_PC87382_CHIP_H
-
-#include <uart8250.h>
-
-struct superio_nsc_pc87382_config {
-
-};
-
-#endif
diff --git a/src/superio/nsc/pc87382/superio.c b/src/superio/nsc/pc87382/superio.c
index 7f4afe3..9d4bee0 100644
--- a/src/superio/nsc/pc87382/superio.c
+++ b/src/superio/nsc/pc87382/superio.c
@@ -27,7 +27,6 @@
 #include <uart8250.h>
 #include <pc80/keyboard.h>
 #include <stdlib.h>
-#include "chip.h"
 #include "pc87382.h"
 
 static void init(device_t dev)
diff --git a/src/superio/nsc/pc87384/chip.h b/src/superio/nsc/pc87384/chip.h
deleted file mode 100644
index 1c49725..0000000
--- a/src/superio/nsc/pc87384/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Sven Schnelle <svens at stackframe.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_NSC_PC87384_CHIP_H
-#define SUPERIO_NSC_PC87384_CHIP_H
-
-#include <uart8250.h>
-
-struct superio_nsc_pc87384_config {
-
-};
-
-#endif
diff --git a/src/superio/nsc/pc87384/superio.c b/src/superio/nsc/pc87384/superio.c
index 11ddc82..39177fd 100644
--- a/src/superio/nsc/pc87384/superio.c
+++ b/src/superio/nsc/pc87384/superio.c
@@ -27,7 +27,6 @@
 #include <uart8250.h>
 #include <pc80/keyboard.h>
 #include <stdlib.h>
-#include "chip.h"
 #include "pc87384.h"
 
 static struct device_operations ops = {
diff --git a/src/superio/nsc/pc87392/chip.h b/src/superio/nsc/pc87392/chip.h
deleted file mode 100644
index a6ebf1b..0000000
--- a/src/superio/nsc/pc87392/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Sven Schnelle <svens at stackframe.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_NSC_PC87392_CHIP_H
-#define SUPERIO_NSC_PC87392_CHIP_H
-
-#include <uart8250.h>
-
-struct superio_nsc_pc87392_config {
-
-};
-
-#endif
diff --git a/src/superio/nsc/pc87392/superio.c b/src/superio/nsc/pc87392/superio.c
index 1b527ad..81c679c 100644
--- a/src/superio/nsc/pc87392/superio.c
+++ b/src/superio/nsc/pc87392/superio.c
@@ -26,7 +26,6 @@
 #include <bitops.h>
 #include <uart8250.h>
 #include <stdlib.h>
-#include "chip.h"
 #include "pc87392.h"
 
 static void init(device_t dev)
diff --git a/src/superio/smsc/lpc47n217/chip.h b/src/superio/smsc/lpc47n217/chip.h
deleted file mode 100644
index b0fbe8c..0000000
--- a/src/superio/smsc/lpc47n217/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#ifndef SUPERIO_SMSC_LPC47N217_CHIP_H
-#define SUPERIO_SMSC_LPC47N217_CHIP_H
-
-#include <uart8250.h>
-
-struct superio_smsc_lpc47n217_config {
-
-};
-
-#endif
diff --git a/src/superio/smsc/lpc47n217/superio.c b/src/superio/smsc/lpc47n217/superio.c
index 01c96b1..2658831 100644
--- a/src/superio/smsc/lpc47n217/superio.c
+++ b/src/superio/smsc/lpc47n217/superio.c
@@ -33,7 +33,6 @@
 #include <uart8250.h>
 #include <assert.h>
 #include <stdlib.h>
-#include "chip.h"
 #include "lpc47n217.h"
 
 /* Forward declarations */
@@ -133,9 +132,6 @@ static void lpc47n217_pnp_enable(device_t dev)
  */
 static void lpc47n217_init(device_t dev)
 {
-	/* TODO: Reserved for future. */
-	/* struct superio_smsc_lpc47n217_config* conf = dev->chip_info; */
-
 	if (!dev->enabled)
 		return;
 }
diff --git a/src/superio/via/vt1211/chip.h b/src/superio/via/vt1211/chip.h
deleted file mode 100644
index 89d64cd..0000000
--- a/src/superio/via/vt1211/chip.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2004 Nick Barker <nick.barker9 at btinternet.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_VIA_VT1211_CHIP_H
-#define SUPERIO_VIA_VT1211_CHIP_H
-
-#include <uart8250.h>
-
-struct superio_via_vt1211_config {
-
-};
-
-#endif
diff --git a/src/superio/via/vt1211/vt1211.c b/src/superio/via/vt1211/vt1211.c
index e681d6e..abcae77 100644
--- a/src/superio/via/vt1211/vt1211.c
+++ b/src/superio/via/vt1211/vt1211.c
@@ -26,7 +26,6 @@
 #include <uart8250.h>
 #include <stdlib.h>
 #include "vt1211.h"
-#include "chip.h"
 
 static u8 hwm_io_regs[] = {
 	0x10,0x03, 0x11,0x10, 0x12,0x0d, 0x13,0x7f,
diff --git a/util/sconfig/main.c b/util/sconfig/main.c
index 3aa57f9..f066d7b 100644
--- a/util/sconfig/main.c
+++ b/util/sconfig/main.c
@@ -179,25 +179,24 @@ struct device *new_chip(struct device *parent, struct device *bus, char *path) {
 }
 
 void add_header(struct device *dev) {
-	if ((dev->chiph_exists) || (scan_mode == KCONFIG_MODE)){
-		int include_exists = 0;
-		struct header *h = &headers;
-		while (h->next) {
-			int result = strcmp(dev->name, h->next->name);
-			if (result == 0) {
-				include_exists = 1;
-				break;
-			}
-			if (result < 0) break;
-			h = h->next;
-		}
-		if (!include_exists) {
-			struct header *tmp = h->next;
-			h->next = malloc(sizeof(struct header));
-			memset(h->next, 0, sizeof(struct header));
-			h->next->name = dev->name;
-			h->next->next = tmp;
+	int include_exists = 0;
+	struct header *h = &headers;
+	while (h->next) {
+		int result = strcmp(dev->name, h->next->name);
+		if (result == 0) {
+			include_exists = 1;
+			break;
 		}
+		if (result < 0) break;
+		h = h->next;
+	}
+	if (!include_exists) {
+		struct header *tmp = h->next;
+		h->next = malloc(sizeof(struct header));
+		memset(h->next, 0, sizeof(struct header));
+		h->next->chiph_exists = dev->chiph_exists;
+		h->next->name = dev->name;
+		h->next->next = tmp;
 	}
 }
 
@@ -617,8 +616,10 @@ int main(int argc, char** argv) {
 		h = &headers;
 		while (h->next) {
 			h = h->next;
-			fprintf(autogen, "#include \"%s/chip.h\"\n", h->name);
+			if (h->chiph_exists)
+				fprintf(autogen, "#include \"%s/chip.h\"\n", h->name);
 		}
+		fprintf(autogen, "\n#ifndef __PRE_RAM__\n");
 		h = &headers;
 		while (h->next) {
 			h = h->next;
@@ -627,6 +628,7 @@ int main(int argc, char** argv) {
 			fprintf(autogen, "extern struct chip_operations %s_ops;\n", name_underscore);
 			free(name_underscore);
 		}
+		fprintf(autogen, "#endif\n");
 
 		walk_device_tree(autogen, &root, inherit_subsystem_ids, NULL);
 		fprintf(autogen, "\n/* pass 0 */\n");
diff --git a/util/sconfig/sconfig.h b/util/sconfig/sconfig.h
index 1576600..b8a231a 100644
--- a/util/sconfig/sconfig.h
+++ b/util/sconfig/sconfig.h
@@ -86,6 +86,7 @@ struct device *head;
 struct header;
 struct header {
 	char *name;
+	int chiph_exists;
 	struct header *next;
 };
 




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