[coreboot] New patch to review for coreboot: 422ac12 Split the SCRATCH_SIZE to SRATCH_HEAP_SIZE and SCRATCH_STACK_SIZE

[Zheng Bao (zheng.bao@amd.com)]

Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/926

-gerrit

commit 422ac12b0e8d2c21e6f3d12ab53ae7ae30b6b634
Author: zbao <fishbaozi at gmail.com>
Date:   Wed Apr 25 18:59:30 2012 +0800

    Split the SCRATCH_SIZE to SRATCH_HEAP_SIZE and SCRATCH_STACK_SIZE
    
    Please note it is not just changing the hardcode to macro. The orignal
    SCRATCH_SIZE did not contain the HEAP_SIZE. It was incorrect.
    
    Change-Id: I1d9fade0e6da8752a0c86b47c9eabe54daa015cb
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: zbao <fishbaozi at gmail.com>
---
 src/Kconfig                                |    6 +++++-
 src/arch/x86/boot/tables.c                 |    2 +-
 src/cpu/amd/agesa/family14/Kconfig         |    8 +++++++-
 src/cpu/amd/agesa/s3_resume.c              |    3 +--
 src/include/cbmem.h                        |    2 +-
 src/mainboard/amd/persimmon/BiosCallOuts.h |    2 +-
 src/mainboard/amd/persimmon/agesawrapper.c |    2 +-
 7 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/src/Kconfig b/src/Kconfig
index e8a560d..602bcb2 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -270,7 +270,11 @@ config HAVE_INIT_TIMER
 	default n if UDELAY_IO
 	default y
 
-config HIGH_SCRATCH_MEMORY_SIZE
+config HIGH_SCRATCH_STACK_MEMORY_SIZE
+	hex
+	default 0x0
+
+config HIGH_SCRATCH_HEAP_MEMORY_SIZE
 	hex
 	default 0x0
 
diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c
index 70f3117..0f3b347 100644
--- a/src/arch/x86/boot/tables.c
+++ b/src/arch/x86/boot/tables.c
@@ -237,7 +237,7 @@ struct lb_memory *write_tables(void)
 	 * the result right now. If it fails, ACPI resume will be disabled.
 	 */
 	cbmem_add(CBMEM_ID_RESUME, HIGH_MEMORY_SAVE);
-	cbmem_add(CBMEM_ID_RESUME_SCRATCH, CONFIG_HIGH_SCRATCH_MEMORY_SIZE);
+	cbmem_add(CBMEM_ID_RESUME_SCRATCH, CONFIG_HIGH_SCRATCH_HEAP_MEMORY_SIZE + CONFIG_HIGH_SCRATCH_STACK_MEMORY_SIZE);
 #endif
 
 #if CONFIG_MULTIBOOT
diff --git a/src/cpu/amd/agesa/family14/Kconfig b/src/cpu/amd/agesa/family14/Kconfig
index 6713660..a8541ce 100644
--- a/src/cpu/amd/agesa/family14/Kconfig
+++ b/src/cpu/amd/agesa/family14/Kconfig
@@ -67,8 +67,14 @@ config HAVE_INIT_TIMER
 	default y
 	depends on CPU_AMD_AGESA_FAMILY14
 
-config HIGH_SCRATCH_MEMORY_SIZE
+config HIGH_SCRATCH_STACK_MEMORY_SIZE
 	hex
 	# Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000)
 	default 0x71000
 	depends on CPU_AMD_AGESA_FAMILY14
+
+config HIGH_SCRATCH_HEAP_MEMORY_SIZE
+	hex
+	# Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000)
+	default 0x20000
+	depends on CPU_AMD_AGESA_FAMILY14
diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c
index 16c959a..32e75a5 100644
--- a/src/cpu/amd/agesa/s3_resume.c
+++ b/src/cpu/amd/agesa/s3_resume.c
@@ -137,8 +137,7 @@ void move_stack_high_mem(void)
 	void *high_stack;
 
 	high_stack = cbmem_find(CBMEM_ID_RESUME_SCRATCH);
-	memcpy(high_stack, (void *)BSP_STACK_BASE_ADDR,
-		(CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE));
+	memcpy(high_stack, (void *)BSP_STACK_BASE_ADDR,  CONFIG_HIGH_SCRATCH_HEAP_MEMORY_SIZE);
 
 	__asm__
 	    volatile ("add	%0, %%esp; add %0, %%ebp; invd"::"g"
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 33e2de4..c1519ad 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -29,7 +29,7 @@
 
 #if CONFIG_HAVE_ACPI_RESUME
 #define HIGH_MEMORY_SAVE	(CONFIG_RAMTOP - CONFIG_RAMBASE)
-#define HIGH_MEMORY_SIZE	(HIGH_MEMORY_SAVE + CONFIG_HIGH_SCRATCH_MEMORY_SIZE + HIGH_MEMORY_DEF_SIZE)
+#define HIGH_MEMORY_SIZE	(HIGH_MEMORY_SAVE + CONFIG_HIGH_SCRATCH_STACK_MEMORY_SIZE + CONFIG_HIGH_SCRATCH_HEAP_MEMORY_SIZE + HIGH_MEMORY_DEF_SIZE)
 
 /* Delegation of resume backup memory so we don't have to
  * (slowly) handle backing up OS memory in romstage.c
diff --git a/src/mainboard/amd/persimmon/BiosCallOuts.h b/src/mainboard/amd/persimmon/BiosCallOuts.h
index cd23110..0f58f23 100644
--- a/src/mainboard/amd/persimmon/BiosCallOuts.h
+++ b/src/mainboard/amd/persimmon/BiosCallOuts.h
@@ -24,7 +24,7 @@
 #include "AGESA.h"
 
 #define BIOS_HEAP_START_ADDRESS			0x10000 /* HEAP during cold boot */
-#define BIOS_HEAP_SIZE				0x20000
+#define BIOS_HEAP_SIZE				CONFIG_HIGH_SCRATCH_HEAP_MEMORY_SIZE
 #define BSP_STACK_BASE_ADDR			0x30000
 
 typedef struct _BIOS_HEAP_MANAGER {
diff --git a/src/mainboard/amd/persimmon/agesawrapper.c b/src/mainboard/amd/persimmon/agesawrapper.c
index e60673e..fcd7875 100644
--- a/src/mainboard/amd/persimmon/agesawrapper.c
+++ b/src/mainboard/amd/persimmon/agesawrapper.c
@@ -255,7 +255,7 @@ UINT32 GetHeapBase(
 
 	/* Both romstage and ramstage has this S3 detect. */
 	if (acpi_get_sleep_type() == 3)
-		heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* himem_heap_base + high_stack_size */
+		heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + CONFIG_HIGH_SCRATCH_STACK_MEMORY_SIZE; /* Skip the stack. */
 	else
 		heap = BIOS_HEAP_START_ADDRESS; /* low mem */