[coreboot] New patch to review for coreboot: e4fc528 Add the memory reference code binary for sandybridge chipsets

[Luc Verhaegen]

On Sat, Apr 14, 2012 at 07:57:19PM -0700, ron minnich wrote:
> On Sat, Apr 14, 2012 at 3:12 AM, Carl-Daniel Hailfinger
> <c-d.hailfinger.devel.2006 at gmx.net> wrote:
> 
> > I hope this is not going into the main repository, but into some
> > separate repository instead.
> > Right now we can tell people that all code in our official git
> > repository is GPL-compatible, and I'd like to keep it that way.
> 
> We maintain GPL V2 compatibility as this is a blob that is placed into
> cbfs. There is no linking.
> 
> I don't see it as different from what we do today with microcode,
> which has been in the coreboot tree for many years now. While that
> code is in "source" form in some sense, it really is a binary blob. We
> would not have wanted to force people to maintain all that as as
> separate repo.
> 
> Hope that helps. I'd like to make sandybridge support as convenient as possible.
> 
> thanks
> 
> ron

Convenience... at what cost? What _other_ microcode are you shipping 
today?

And here i thought that fully free memory controller setup is what made 
coreboot shine.

Luc Verhaegen.