[coreboot] Patch set updated for coreboot: 2cf9f47 Remove Dell s1850

Ronald G. Minnich (rminnich@gmail.com) gerrit at coreboot.org
Fri Apr 6 20:02:51 CEST 2012


Ronald G. Minnich (rminnich at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/876

-gerrit

commit 2cf9f473b6aea64419c1f0ca536ed5c11ca5fb41
Author: Ron Minnich <rminnich at gmail.com>
Date:   Thu Apr 5 20:25:38 2012 -0700

    Remove Dell s1850
    
    It's almost 10 years old. It never worked. It's a soldered in FLASH,
    so mistakes are fatal. It's got no redeeming features.
    
    Change-Id: I83ff009bd7a6d5289229ca39608789ae5c33710b
---
 src/mainboard/dell/Kconfig              |    5 -
 src/mainboard/dell/s1850/Kconfig        |   44 ----
 src/mainboard/dell/s1850/Makefile.inc   |    1 -
 src/mainboard/dell/s1850/chip.h         |    3 -
 src/mainboard/dell/s1850/cmos.layout    |   80 --------
 src/mainboard/dell/s1850/debug.c        |  289 ---------------------------
 src/mainboard/dell/s1850/devicetree.cb  |   72 -------
 src/mainboard/dell/s1850/irq_tables.c   |   53 -----
 src/mainboard/dell/s1850/mainboard.c    |    7 -
 src/mainboard/dell/s1850/mptable.c      |  160 ---------------
 src/mainboard/dell/s1850/reset.c        |   16 --
 src/mainboard/dell/s1850/romstage.c     |  324 -------------------------------
 src/mainboard/dell/s1850/s1850_fixups.c |   60 ------
 src/mainboard/dell/s1850/watchdog.c     |   57 ------
 14 files changed, 0 insertions(+), 1171 deletions(-)

diff --git a/src/mainboard/dell/Kconfig b/src/mainboard/dell/Kconfig
index fb665c4..c4bd673 100644
--- a/src/mainboard/dell/Kconfig
+++ b/src/mainboard/dell/Kconfig
@@ -3,13 +3,8 @@ if VENDOR_DELL
 choice
 	prompt "Mainboard model"
 
-config BOARD_DELL_S1850
-	bool "PowerEdge 1850"
-
 endchoice
 
-source "src/mainboard/dell/s1850/Kconfig"
-
 config MAINBOARD_VENDOR
 	string
 	default "Dell"
diff --git a/src/mainboard/dell/s1850/Kconfig b/src/mainboard/dell/s1850/Kconfig
deleted file mode 100644
index cd4a6a9..0000000
--- a/src/mainboard/dell/s1850/Kconfig
+++ /dev/null
@@ -1,44 +0,0 @@
-if BOARD_DELL_S1850
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select ARCH_X86
-	select CPU_INTEL_SOCKET_MPGA604
-	select NORTHBRIDGE_INTEL_E7520
-	select SOUTHBRIDGE_INTEL_I82801EX
-	select SOUTHBRIDGE_INTEL_PXHD
-	select SUPERIO_NSC_PC8374
-	select ROMCC
-	select HAVE_OPTION_TABLE
-	select BOARD_HAS_HARD_RESET
-	select HAVE_PIRQ_TABLE
-	select HAVE_MP_TABLE
-	select USE_WATCHDOG_ON_BOOT
-	select BOARD_ROMSIZE_KB_1024
-	select UDELAY_TSC
-
-config MAINBOARD_DIR
-	string
-	default dell/s1850
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "PowerEdge 1850"
-
-config MAX_CPUS
-	int
-	default 4
-
-config MAX_PHYSICAL_CPUS
-	int
-	default 1
-
-config IRQ_SLOT_COUNT
-	int
-	default 9
-
-config DIMM_MAP_LOGICAL
-	hex
-	default 0x2841
-
-endif # BOARD_DELL_S1850
diff --git a/src/mainboard/dell/s1850/Makefile.inc b/src/mainboard/dell/s1850/Makefile.inc
deleted file mode 100644
index 0f285cd..0000000
--- a/src/mainboard/dell/s1850/Makefile.inc
+++ /dev/null
@@ -1 +0,0 @@
-ROMCCFLAGS := -mcpu=p4 -O2
diff --git a/src/mainboard/dell/s1850/chip.h b/src/mainboard/dell/s1850/chip.h
deleted file mode 100644
index d138e51..0000000
--- a/src/mainboard/dell/s1850/chip.h
+++ /dev/null
@@ -1,3 +0,0 @@
-extern struct chip_operations mainboard_ops;
-
-struct mainboard_config {};
diff --git a/src/mainboard/dell/s1850/cmos.layout b/src/mainboard/dell/s1850/cmos.layout
deleted file mode 100644
index 81f1a69..0000000
--- a/src/mainboard/dell/s1850/cmos.layout
+++ /dev/null
@@ -1,80 +0,0 @@
-entries
-
-#start-bit length  config config-ID    name
-#0            8       r       0        seconds
-#8            8       r       0        alarm_seconds
-#16           8       r       0        minutes
-#24           8       r       0        alarm_minutes
-#32           8       r       0        hours
-#40           8       r       0        alarm_hours
-#48           8       r       0        day_of_week
-#56           8       r       0        day_of_month
-#64           8       r       0        month
-#72           8       r       0        year
-#80           4       r       0        rate_select
-#84           3       r       0        REF_Clock
-#87           1       r       0        UIP
-#88           1       r       0        auto_switch_DST
-#89           1       r       0        24_hour_mode
-#90           1       r       0        binary_values_enable
-#91           1       r       0        square-wave_out_enable
-#92           1       r       0        update_finished_enable
-#93           1       r       0        alarm_interrupt_enable
-#94           1       r       0        periodic_interrupt_enable
-#95           1       r       0        disable_clock_updates
-#96         288       r       0        temporary_filler
-0          384       r       0        reserved_memory
-384          1       e       4        boot_option
-385          1       e       4        last_boot
-386          1       e       1        ECC_memory
-388          4       r       0        reboot_bits
-392          3       e       5        baud_rate
-395          1       e       2        hyper_threading
-400          1       e       1        power_on_after_fail
-412          4       e       6        debug_level
-416          4       e       7        boot_first
-420          4       e       7        boot_second
-424          4       e       7        boot_third
-428          4       h       0        boot_index
-432          8       h       0        boot_countdown
-728        256       h       0        user_data
-984         16       h       0        check_sum
-# Reserve the extended AMD configuration registers
-1000        24       r       0        amd_reserved
-
-
-
-enumerations
-
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-5     0     115200
-5     1     57600
-5     2     38400
-5     3     19200
-5     4     9600
-5     5     4800
-5     6     2400
-5     7     1200
-6     6     Notice
-6     7     Info
-6     8     Debug
-6     9     Spew
-7     0     Network
-7     1     HDD
-7     2     Floppy
-7     8     Fallback_Network
-7     9     Fallback_HDD
-7     10    Fallback_Floppy
-#7     3     ROM
-
-checksums
-
-checksum 392 983 984
-
-
diff --git a/src/mainboard/dell/s1850/debug.c b/src/mainboard/dell/s1850/debug.c
deleted file mode 100644
index 7904c06..0000000
--- a/src/mainboard/dell/s1850/debug.c
+++ /dev/null
@@ -1,289 +0,0 @@
-#include <spd.h>
-
-static void print_reg(unsigned char index)
-{
-        unsigned char data;
-
-        outb(index, 0x2e);
-        data = inb(0x2f);
-	print_debug("0x");
-	print_debug_hex8(index);
-	print_debug(": 0x");
-	print_debug_hex8(data);
-	print_debug("\n");
-        return;
-}
-
-static void xbus_en(void)
-{
-        /* select the XBUS function in the SIO */
-        outb(0x07, 0x2e);
-        outb(0x0f, 0x2f);
-        outb(0x30, 0x2e);
-        outb(0x01, 0x2f);
-	return;
-}
-
-static void setup_func(unsigned char func)
-{
-        /* select the function in the SIO */
-        outb(0x07, 0x2e);
-        outb(func, 0x2f);
-        /* print out the regs */
-        print_reg(0x30);
-        print_reg(0x60);
-        print_reg(0x61);
-        print_reg(0x62);
-        print_reg(0x63);
-        print_reg(0x70);
-        print_reg(0x71);
-        print_reg(0x74);
-        print_reg(0x75);
-        return;
-}
-
-static void siodump(void)
-{
-        int i;
-        unsigned char data;
-
-	 print_debug("\n*** SERVER I/O REGISTERS ***\n");
-        for (i=0x10; i<=0x2d; i++) {
-                print_reg((unsigned char)i);
-        }
-#if 0
-        print_debug("\n*** XBUS REGISTERS ***\n");
-        setup_func(0x0f);
-        for (i=0xf0; i<=0xff; i++) {
-                print_reg((unsigned char)i);
-        }
-
-        print_debug("\n***  SERIAL 1 CONFIG REGISTERS ***\n");
-        setup_func(0x03);
-        print_reg(0xf0);
-
-        print_debug("\n***  SERIAL 2 CONFIG REGISTERS ***\n");
-        setup_func(0x02);
-        print_reg(0xf0);
-
-#endif
-        print_debug("\n***  GPIO REGISTERS ***\n");
-        setup_func(0x07);
-        for (i=0xf0; i<=0xf8; i++) {
-                print_reg((unsigned char)i);
-        }
-        print_debug("\n***  GPIO VALUES ***\n");
-        data = inb(0x68a);
-	print_debug("\nGPDO 4: 0x");
-	print_debug_hex8(data);
-        data = inb(0x68b);
-	print_debug("\nGPDI 4: 0x");
-	print_debug_hex8(data);
-	print_debug("\n");
-
-#if 0
-
-        print_debug("\n***  WATCHDOG TIMER REGISTERS ***\n");
-        setup_func(0x0a);
-        print_reg(0xf0);
-
-        print_debug("\n***  FAN CONTROL REGISTERS ***\n");
-        setup_func(0x09);
-        print_reg(0xf0);
-        print_reg(0xf1);
-
-        print_debug("\n***  RTC REGISTERS ***\n");
-        setup_func(0x10);
-        print_reg(0xf0);
-        print_reg(0xf1);
-        print_reg(0xf3);
-        print_reg(0xf6);
-        print_reg(0xf7);
-        print_reg(0xfe);
-        print_reg(0xff);
-
-        print_debug("\n***  HEALTH MONITORING & CONTROL REGISTERS ***\n");
-        setup_func(0x14);
-        print_reg(0xf0);
-#endif
-        return;
-}
-
-static void print_debug_pci_dev(unsigned dev)
-{
-	print_debug("PCI: ");
-	print_debug_hex8((dev >> 16) & 0xff);
-	print_debug_char(':');
-	print_debug_hex8((dev >> 11) & 0x1f);
-	print_debug_char('.');
-	print_debug_hex8((dev >> 8) & 7);
-}
-
-static void print_pci_devices(void)
-{
-	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0);
-		dev <= PCI_DEV(0, 0x1f, 0x7);
-		dev += PCI_DEV(0,0,1)) {
-		uint32_t id;
-		id = pci_read_config32(dev, PCI_VENDOR_ID);
-		if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
-			(((id >> 16) & 0xffff) == 0xffff) ||
-			(((id >> 16) & 0xffff) == 0x0000)) {
-			continue;
-		}
-		print_debug_pci_dev(dev);
-		print_debug("\n");
-	}
-}
-
-static void dump_pci_device(unsigned dev)
-{
-	int i;
-	print_debug_pci_dev(dev);
-	print_debug("\n");
-
-	for(i = 0; i <= 255; i++) {
-		unsigned char val;
-		if ((i & 0x0f) == 0) {
-			print_debug_hex8(i);
-			print_debug_char(':');
-		}
-		val = pci_read_config8(dev, i);
-		print_debug_char(' ');
-		print_debug_hex8(val);
-		if ((i & 0x0f) == 0x0f) {
-			print_debug("\n");
-		}
-	}
-}
-
-static void dump_bar14(unsigned dev)
-{
-	int i;
-	unsigned long bar;
-
-	print_debug("BAR 14 Dump\n");
-
-	bar = pci_read_config32(dev, 0x14);
-	for(i = 0; i <= 0x300; i+=4) {
-#if 0
-		unsigned char val;
-		if ((i & 0x0f) == 0) {
-			print_debug_hex8(i);
-			print_debug_char(':');
-		}
-		val = pci_read_config8(dev, i);
-#endif
-		if((i%4)==0) {
-		print_debug("\n");
-		print_debug_hex16(i);
-		print_debug_char(' ');
-		}
-		print_debug_hex32(read32(bar + i));
-		print_debug_char(' ');
-	}
-	print_debug("\n");
-}
-
-static void dump_pci_devices(void)
-{
-	device_t dev;
-	for(dev = PCI_DEV(0, 0, 0);
-		dev <= PCI_DEV(0, 0x1f, 0x7);
-		dev += PCI_DEV(0,0,1)) {
-		uint32_t id;
-		id = pci_read_config32(dev, PCI_VENDOR_ID);
-		if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
-			(((id >> 16) & 0xffff) == 0xffff) ||
-			(((id >> 16) & 0xffff) == 0x0000)) {
-			continue;
-		}
-		dump_pci_device(dev);
-	}
-}
-
-void dump_spd_registers(void)
-{
-        unsigned device;
-        device = DIMM0;
-        while(device <= DIMM7) {
-                int status = 0;
-                int i;
-        	print_debug("\n");
-                print_debug("dimm ");
-		print_debug_hex8(device);
-
-                for(i = 0; (i < 256) ; i++) {
-	                unsigned char byte;
-                        if ((i % 16) == 0) {
-				print_debug("\n");
-				print_debug_hex8(i);
-				print_debug(": ");
-                        }
-			status = smbus_read_byte(device, i);
-                        if (status < 0) {
-			         print_debug("bad device: ");
-				 print_debug_hex8(-status);
-				 print_debug("\n");
-			         break;
-			}
-			print_debug_hex8(status);
-			print_debug_char(' ');
-		}
-		device++;
-		print_debug("\n");
-	}
-}
-
-void show_dram_slots(void)
-{
-        unsigned device;
-        device = DIMM0;
-        while(device <= DIMM7) {
-		 int status = 0;
-		int i;
-		print_debug("\n");
-		print_debug("dimm ");
-		print_debug_hex8(device);
-
-		status = smbus_read_byte(device, 0);
-		if (status < 0) {
-			print_debug("bad device: ");
-		} else {
-			print_debug("present: ");
-		}
-		print_debug_hex8(status);
-		print_debug("\n");
-		device++;
-		print_debug("\n");
-	}
-}
-
-void dump_ipmi_registers(void)
-{
-        unsigned device;
-        device = 0x42;
-        while(device <= 0x42) {
-                int status = 0;
-                int i;
-        	print_debug("\n");
-                print_debug("ipmi ");
-		print_debug_hex8(device);
-
-                for(i = 0; (i < 8) ; i++) {
-	                unsigned char byte;
-			status = smbus_read_byte(device, 2);
-                        if (status < 0) {
-			         print_debug("bad device: ");
-				 print_debug_hex8(-status);
-				 print_debug("\n");
-			         break;
-			}
-			print_debug_hex8(status);
-			print_debug_char(' ');
-		}
-		device++;
-		print_debug("\n");
-	}
-}
diff --git a/src/mainboard/dell/s1850/devicetree.cb b/src/mainboard/dell/s1850/devicetree.cb
deleted file mode 100644
index c56fd37..0000000
--- a/src/mainboard/dell/s1850/devicetree.cb
+++ /dev/null
@@ -1,72 +0,0 @@
-chip northbridge/intel/e7520 # mch
-	device pci_domain 0 on
-		subsystemid 0x15d9 0x5580 inherit
-		chip southbridge/intel/i82801ex # i82801er
-			# USB ports
-			device pci 1d.0 on end
-			device pci 1d.1 on end
-			device pci 1d.2 on end
-			device pci 1d.3 on end
-			device pci 1d.7 on end
-
-			# -> Bridge
-			device pci 1e.0 on end
-
-			# -> ISA
-			device pci 1f.0 on
-				chip superio/nsc/pc8374
-					device pnp 2e.0 off end
-					device pnp 2e.1 off end
-					device pnp 2e.2 off end
-					device pnp 2e.3 on
-						 io 0x60 = 0x3f8
-						irq 0x70 = 4
-					end
-					device pnp 2e.4 off end
-					device pnp 2e.5 off end
-					device pnp 2e.6 off end
-					device pnp 2e.7 off end
-					device pnp 2e.8 off end
-				end
-			end
-			# -> IDE
-			device pci 1f.1 on end
-			# -> SATA
-			device pci 1f.2 on end
-			device pci 1f.3 on end
-
-			register "pirq_a_d" = "0x8a07030b"
-			register "pirq_e_h" = "0x85808080"
-		end
-		device pci 00.0 on end
-		device pci 00.1 on end
-		device pci 01.0 on end
-		device pci 02.0 on
-			chip southbridge/intel/pxhd # pxhd1
-				# Bus bridges and ioapics usually bus 1
-				device pci 0.0 on
-				# On board gig e1000
-					chip drivers/generic/generic
-        		        	        device pci 03.0 on end
-        		        	        device pci 03.1 on end
-        		        	end
-				end
-				device pci 0.1 on end
-				device pci 0.2 on end
-				device pci 0.3 on end
-			end
-		end
-		device pci 04.0 on end
-		device pci 06.0 on end
-	end
-	device lapic_cluster 0 on
-		chip cpu/intel/socket_mPGA604 # cpu 0
-			device lapic 0 on end
-		end
-		chip cpu/intel/socket_mPGA604 # cpu 1
-			device lapic 6 on end
-		end
-	end
-	register "intrline" = "0x00070100"
-end
-
diff --git a/src/mainboard/dell/s1850/irq_tables.c b/src/mainboard/dell/s1850/irq_tables.c
deleted file mode 100644
index e6073c7..0000000
--- a/src/mainboard/dell/s1850/irq_tables.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) by the coreboot pirq tool.
- * This file was programatically generated.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
- */
-
-#include <arch/pirq_routing.h>
-
-const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,
-	PIRQ_VERSION,
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x11 << 3) | 0x0,	/* Interrupt router device */
-	0xc20,			/* IRQs devoted exclusively to PCI usage */
-	0x1106,			/* Vendor */
-	0x596,			/* Device */
-	0,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x66,			/* Checksum */
-	{
-		/* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x14<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x0d<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x2, 0x0},
-		{0x00,(0x0e<<3)|0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x3, 0x0},
-		{0x00,(0x13<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0x0deb8}}, 0x4, 0x0},
-		{0x00,(0x11<<3)|0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x0f<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x01<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x10<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x12<<3)|0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr);
-}
diff --git a/src/mainboard/dell/s1850/mainboard.c b/src/mainboard/dell/s1850/mainboard.c
deleted file mode 100644
index 3d22f2d..0000000
--- a/src/mainboard/dell/s1850/mainboard.c
+++ /dev/null
@@ -1,7 +0,0 @@
-#include <device/device.h>
-#include "chip.h"
-
-struct chip_operations mainboard_ops = {
-	CHIP_NAME("Dell S1850 Mainboard")
-};
-
diff --git a/src/mainboard/dell/s1850/mptable.c b/src/mainboard/dell/s1850/mptable.c
deleted file mode 100644
index 0c7562c..0000000
--- a/src/mainboard/dell/s1850/mptable.c
+++ /dev/null
@@ -1,160 +0,0 @@
-#include <console/console.h>
-#include <arch/smp/mpspec.h>
-#include <arch/ioapic.h>
-#include <device/pci.h>
-#include <string.h>
-#include <stdint.h>
-
-static void *smp_write_config_table(void *v)
-{
-	struct mp_config_table *mc;
-	int bus_isa;
-	unsigned char bus_pxhd_1;
-	unsigned char bus_pxhd_2;
-	unsigned char bus_pxhd_3;
-	unsigned char bus_pxhd_4;
-	unsigned char bus_ich5r_1;
-
-	mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-
-	mptable_init(mc, LOCAL_APIC_ADDR);
-
-	smp_write_processors(mc);
-
-	{
-		device_t dev;
-
-		/* ich5r */
-		dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
-		if (dev) {
-			bus_ich5r_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-		}
-		else {
-			printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
-			bus_ich5r_1 = 7;
-		}
-		/* pxhd-1 */
-		dev = dev_find_slot(1, PCI_DEVFN(0x0,0));
-		if (dev) {
-			bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-		}
-		else {
-			printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.0, using defaults\n");
-			bus_pxhd_1 = 2;
-		}
-		/* pxhd-2 */
-		dev = dev_find_slot(1, PCI_DEVFN(0x00,2));
-		if (dev) {
-			bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-		}
-		else {
-			printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.2, using defaults\n");
-			bus_pxhd_2 = 3;
-		}
-
-		/* pxhd-3 */
-		dev = dev_find_slot(0, PCI_DEVFN(0x4,0));
-		if (dev) {
-			bus_pxhd_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-		}
-		else {
-			printk(BIOS_DEBUG, "ERROR - could not find PCI 0:04.0, using defaults\n");
-			bus_pxhd_3 = 5;
-		}
-		/* pxhd-4 */
-		dev = dev_find_slot(0, PCI_DEVFN(0x06,0));
-		if (dev) {
-			bus_pxhd_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-		}
-		else {
-			printk(BIOS_DEBUG, "ERROR - could not find PCI 0:06.0, using defaults\n");
-			bus_pxhd_4 = 6;
-		}
-
-	}
-
-	mptable_write_buses(mc, NULL, &bus_isa);
-
-	/* IOAPIC handling */
-
-	smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
-	{
-		struct resource *res;
-		device_t dev;
-		/* pxhd apic 3 */
-		dev = dev_find_slot(1, PCI_DEVFN(0x00,1));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-				smp_write_ioapic(mc, 0x03, 0x20, res->base);
-			}
-		}
-		else {
-			printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n");
-		}
-		/* pxhd apic 4 */
-		dev = dev_find_slot(1, PCI_DEVFN(0x00,3));
-		if (dev) {
-			res = find_resource(dev, PCI_BASE_ADDRESS_0);
-			if (res) {
-				smp_write_ioapic(mc, 0x04, 0x20, res->base);
-			}
-		}
-		else {
-			printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
-		}
-	}
-
-	mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
-
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		0x00, 0x74, 0x02, 0x10);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		0x00, 0x76, 0x02, 0x12);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		0x00, 0x77, 0x02, 0x17);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		0x00, 0x75, 0x02, 0x13);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		0x00, 0x74, 0x02, 0x10);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		0x00, 0x7c, 0x02, 0x12);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		0x00, 0x7d, 0x02, 0x11);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		bus_pxhd_1, 0x08, 0x03, 0x00);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		bus_pxhd_1, 0x0c, 0x03, 0x06);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		bus_pxhd_1, 0x0d, 0x03, 0x07);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		bus_pxhd_2, 0x08, 0x04, 0x00);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		bus_ich5r_1, 0x04, 0x02, 0x10);
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		bus_pxhd_4, 0x00, 0x02, 0x10);
-#if 0
-	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
-		(bus_isa - 1), 0x04, 0x02, 0x10);
-#endif
-	/* Standard local interrupt assignments */
-#if 0
-	smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x00, MP_APIC_ALL, 0x00);
-#endif
-	smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-		bus_isa, 0x00, MP_APIC_ALL, 0x01);
-
-	/* There is no extension information... */
-
-	/* Compute the checksums */
-	return mptable_finalize(mc);
-}
-
-unsigned long write_smp_table(unsigned long addr)
-{
-	void *v;
-	v = smp_write_floating_table(addr, 0);
-	return (unsigned long)smp_write_config_table(v);
-}
-
diff --git a/src/mainboard/dell/s1850/reset.c b/src/mainboard/dell/s1850/reset.c
deleted file mode 100644
index 745f187..0000000
--- a/src/mainboard/dell/s1850/reset.c
+++ /dev/null
@@ -1,16 +0,0 @@
-#include <arch/io.h>
-#include <reset.h>
-#if defined (__PRE_RAM__)
-#include <arch/romcc_io.h>
-#endif
-
-void soft_reset(void)
-{
-        outb(0x04, 0xcf9);
-}
-
-void hard_reset(void)
-{
-        outb(0x02, 0xcf9);
-        outb(0x06, 0xcf9);
-}
diff --git a/src/mainboard/dell/s1850/romstage.c b/src/mainboard/dell/s1850/romstage.c
deleted file mode 100644
index e636986..0000000
--- a/src/mainboard/dell/s1850/romstage.c
+++ /dev/null
@@ -1,324 +0,0 @@
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include <stdlib.h>
-#include <console/console.h>
-#include "southbridge/intel/i82801ex/early_smbus.c"
-#include "northbridge/intel/e7520/raminit.h"
-#include "superio/nsc/pc8374/early_init.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "cpu/x86/mtrr/earlymtrr.c"
-#include "debug.c"
-#include "watchdog.c"
-// Remove comment if resets in this file are actually used.
-// #include "reset.c"
-#include "s1850_fixups.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-#include "cpu/x86/bist.h"
-#include <spd.h>
-
-#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, PC8374_SP1)
-
-#define DEVPRES_CONFIG  ( \
-	DEVPRES_D0F0 | \
-	DEVPRES_D1F0 | \
-	DEVPRES_D2F0 | \
-	DEVPRES_D3F0 | \
-	DEVPRES_D4F0 | \
-	DEVPRES_D6F0 | \
-	0 )
-#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
-	return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/e7520/raminit.c"
-#include "lib/generic_sdram.c"
-
-/* IPMI garbage. This is all test stuff, if it really works we'll move it somewhere
- */
-
-#define nftransport  0xc
-
-#define OBF  0
-#define IBF 1
-
-#define ipmidata  0xca0
-#define ipmicsr  0xca4
-
-static inline void  ibfzero(void)
-{
-	while(inb(ipmicsr) &  (1<<IBF))
-		;
-}
-static inline void  clearobf(void)
-{
-	(void) inb(ipmidata);
-}
-
-static inline void  waitobf(void)
-{
-	while((inb(ipmicsr) &  (1<<OBF)) == 0)
-		;
-}
-
-/* quite possibly the stupidest interface ever designed. */
-static inline void  first_cmd_byte(unsigned char byte)
-{
-	ibfzero();
-	clearobf();
-	outb(0x61, ipmicsr);
-	ibfzero();
-	clearobf();
-	outb(byte, ipmidata);
-}
-
-static inline void  next_cmd_byte(unsigned char byte)
-{
-
-	ibfzero();
-	clearobf();
-	outb(byte, ipmidata);
-}
-
-static inline void  last_cmd_byte(unsigned char byte)
-{
-	outb(0x62, ipmicsr);
-
-	ibfzero();
-	clearobf();
-	outb(byte,  ipmidata);
-}
-
-static inline void read_response_byte(void)
-{
-	int val = -1;
-	if ((inb(ipmicsr)>>6) != 1)
-		return;
-
-	ibfzero();
-	waitobf();
-	val = inb(ipmidata);
-	outb(0x68, ipmidata);
-
-	/* see if it is done */
-	if ((inb(ipmicsr)>>6) != 1){
-		/* wait for the dummy read. Which describes this protocol */
-		waitobf();
-		(void)inb(ipmidata);
-	}
-}
-
-static inline void ipmidelay(void)
-{
-	int i;
-	for(i = 0; i < 1000; i++) {
-		inb(0x80);
-	}
-}
-
-static inline void bmc_foad(void)
-{
-	unsigned char c;
-	/* be safe; make sure it is really ready */
-	while ((inb(ipmicsr)>>6)) {
-		outb(0x60, ipmicsr);
-		inb(ipmidata);
-	}
-	first_cmd_byte(nftransport << 2);
-	ipmidelay();
-	next_cmd_byte(0x12);
-	ipmidelay();
-	next_cmd_byte(2);
-	ipmidelay();
-	last_cmd_byte(3);
-	ipmidelay();
-}
-
-/* end IPMI garbage */
-
-#include "arch/x86/lib/stages.c"
-
-static void main(unsigned long bist)
-{
-	u8 b;
-	u16 w;
-	u32 l;
-	int do_reset;
-
-	static const struct mem_controller mch[] = {
-		{
-			.node_id = 0,
-			/* the wiring on this part is really messed up */
-			/* this is my best guess so far */
-			.channel0 = {DIMM0, DIMM1, DIMM2, DIMM3, },
-			.channel1 = {DIMM4, DIMM5, DIMM6, DIMM7, },
-		}
-	};
-
-	/* superio setup */
-	/* observed from serialice */
-	static const u8 earlyinit[] = {
-		0x21, 0x11, 0x11,
-		0x22, 1, 1,
-		0x23, 05, 05,
-		0x24, 0x81, 0x81,
-		0x26, 0, 0,
-		0,
-	};
-
-	/* using SerialICE, we've seen this basic reset sequence on the dell.
-	 * we don't understand it as it uses undocumented registers, but
-	 * we're going to clone it.
-	 */
-	/* enable a hidden device. */
-	b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
-	b |= 0x8;
-	pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
-
-	/* read-write lock in CMOS on LPC bridge on ICH5 */
-	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd8, 4);
-
-	/* operate on undocumented device */
-	l = pci_read_config32(PCI_DEV(0, 0, 2), 0xa4);
-	l |= 0x1000;
-	pci_write_config32(PCI_DEV(0, 0, 2), 0xa4, l);
-
-	l = pci_read_config32(PCI_DEV(0, 0, 2), 0x9c);
-	l |= 0x8000;
-	pci_write_config32(PCI_DEV(0, 0, 2), 0x9c, l);
-
-	/* disable undocumented device */
-	b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
-	b &= ~0x8;
-	pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
-
-	/* set up LPC bridge bits, some of which reply on undocumented
-	 * registers
-	 */
-
-	b= pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xd8);
-	b |= 4;
-	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd8, b);
-
-	b= pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xd4);
-	b |= 2;
-	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xd4, b);
-
-	/* ACPI base address */
-	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x40, 0x800);
-
-	/* Enable specific ACPI features */
-	b= pci_read_config8(PCI_DEV(0, 0x1f, 0), 0x44);
-	b |= 0x10;
-	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x44, b);
-
-	/* ACPI control */
-	w = inw(0x868);
-	outw(w|0x800, 0x868);
-	w = inw(0x866);
-	outw(w|2, 0x866);
-
-#if 0
-	/*seriaice shows
-	dell does this so leave it here so I don't forget
- 	 */
-	/* SMBUS */
-	pci_write_config16(PCI_DEV(0, 0x1f, 3), 0x20, 0x08c0);
-
-	/* unknown */
-	b = inb(0x8c2);
-	outb(0xdf, 0x8c2);
-#endif
-
-	/* another device enable? */
-	b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
-	b |= 2;
-	pci_write_config8(PCI_DEV(0, 0, 0), 0xf4, b);
-
-	/* ?? */
-	l = pci_read_config32(PCI_DEV(0, 8, 0), 0xc0);
-	do_reset = l & 0x8000000;
-	l |= 0x8000000;
-	pci_write_config32(PCI_DEV(0, 8, 0), 0xc0, l);
-
-	if (! do_reset) {
-		outb(2, 0xcf9);
-		outb(6, 0xcf9);
-	}
-	if (bist == 0) {
-		/* Skip this if there was a built in self test failure */
-		early_mtrr_init();
-		if (memory_initialized())
-			skip_romstage();
-	}
-	/* Setup the console */
-	mainboard_set_ich5();
-	//bmc_foad();
-	pc8374_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-
-	/* stuff we seem to need */
-	pc8374_enable_dev(PNP_DEV(0x2e, PC8374_KBCK), 0);
-
-	/* GPIOs */
-	pc8374_enable_dev(PNP_DEV(0x2e, PC8374_GPIO), 0xc20);
-
-	/* keep this in mind.
-	SerialICE-hlp: outb 002e <= 23
-	SerialICE-hlp:  inb 002f => 05
-	SerialICE-hlp: outb 002f <= 05
-	SerialICE-hlp: outb 002e <= 24
-	SerialICE-hlp:  inb 002f => c1
-	SerialICE-hlp: outb 002f <= c1
-	 */
-
-	/* Halt if there was a built in self test failure */
-//	report_bist_failure(bist);
-
-	/* MOVE ME TO A BETTER LOCATION !!! */
-	/* config LPC decode for flash memory access */
-        device_t dev;
-        dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
-        if (dev == PCI_DEV_INVALID) {
-                die("Missing ich5?");
-        }
-        pci_write_config32(dev, 0xe8, 0x00000000);
-        pci_write_config8(dev, 0xf0, 0x00);
-
-#if 0
-	display_cpuid_update_microcode();
-#endif
-#if 1
-	print_pci_devices();
-#endif
-#if 1
-	enable_smbus();
-#endif
-#if 0
-//	dump_spd_registers(&cpu[0]);
-	int i;
-	for(i = 0; i < 1; i++)
-		dump_spd_registers();
-#endif
-#if 1
-	show_dram_slots();
-#endif
-	disable_watchdogs();
-//	dump_ipmi_registers();
-	mainboard_set_e7520_leds();
-
-	sdram_initialize(ARRAY_SIZE(mch), mch);
-#if 0
-	dump_pci_devices();
-#endif
-#if 1
-	dump_pci_device(PCI_DEV(0, 0x00, 0));
-//	dump_bar14(PCI_DEV(0, 0x00, 0));
-#endif
-}
diff --git a/src/mainboard/dell/s1850/s1850_fixups.c b/src/mainboard/dell/s1850/s1850_fixups.c
deleted file mode 100644
index 7ef9ce1..0000000
--- a/src/mainboard/dell/s1850/s1850_fixups.c
+++ /dev/null
@@ -1,60 +0,0 @@
-#include <arch/romcc_io.h>
-
-static void mch_reset(void)
-{
-        return;
-}
-
-
-
-static void mainboard_set_e7520_pll(unsigned bits)
-{
-	return;
-}
-
-
-static void mainboard_set_e7520_leds(void)
-{
-	return;
-}
-
-static void mainboard_set_ich5(void)
-{
-	/* coma is 0x3f8 , comb is 0x2f8*/
-	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xe0, 0x10);
-	/* enable decoding of various devices */
-	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xe6, 0x140f);
-	/* 1M flash */
-	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xe3, 0xc0);
-	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xf0, 0x0);
-	/* disable certain devices -- see data sheet -- this is from
-	 * dell settings via lspci
-	 * Note that they leave SMBUS disabled -- 8f6f.
-	 * we leave it enabled and visible in config space -- 8f66
-	 */
-	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xf2, 0x8f66);
-	/* GPIOs -- needed, possibly, for SPD */
-	pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x58, 0x881);
-	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x5c, 0x10);
-
-	/* now the fun begins ... enable the GPIOs as done on factory */
-	/* factory config from IO ports
-	 * It has a few more things enabled than default!
-	 */
-	outl(0x1ae0f183, 0x880);
-	outl(0x1b00ffff, 0x884);
-	outl(0x131f0000, 0x88c);
-	outl(0x00000000, 0x894);
-	outl(0x00040000, 0x898);
-	outl(0x00000000, 0x8a4);
-	outl(0x00000000, 0x8a8);
-	outl(0x000031c0, 0x8ac);
-	outl(0x00000007, 0x8b0);
-	outl(0x00000304, 0x8b4);
-	outl(0x00030303, 0x8b8);
-
-}
-
-
-
-
diff --git a/src/mainboard/dell/s1850/watchdog.c b/src/mainboard/dell/s1850/watchdog.c
deleted file mode 100644
index 43f4029..0000000
--- a/src/mainboard/dell/s1850/watchdog.c
+++ /dev/null
@@ -1,57 +0,0 @@
-#include <device/pnp_def.h>
-
-#define NSC_WD_DEV PNP_DEV(0x2e, 0xa)
-#define NSC_WDBASE 0x600
-#define ICH5_WDBASE 0x400
-#define ICH5_GPIOBASE 0x500
-
-static void disable_sio_watchdog(device_t dev)
-{
-#if 0
-	/* FIXME move me somewhere more appropriate */
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 1);
-	pnp_set_iobase(dev, PNP_IDX_IO0, NSC_WDBASE);
-	/* disable the sio watchdog */
-	outb(0, NSC_WDBASE + 0);
-	pnp_set_enable(dev, 0);
-#endif
-}
-
-static void disable_ich5_watchdog(void)
-{
-	/* FIXME move me somewhere more appropriate */
-	device_t dev;
-	unsigned long value, base;
-	dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
-	if (dev == PCI_DEV_INVALID) {
-		die("Missing ich5?");
-	}
-	/* Enable I/O space */
-	value = pci_read_config16(dev, 0x04);
-	value |= (1 << 10);
-	pci_write_config16(dev, 0x04, value);
-
-	/* Set and enable acpibase */
-	pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
-	pci_write_config8(dev, 0x44, 0x10);
-	base = ICH5_WDBASE + 0x60;
-
-	/* Set bit 11 in TCO1_CNT */
-	value = inw(base + 0x08);
-	value |= 1 << 11;
-	outw(value, base + 0x08);
-
-	/* Clear TCO timeout status */
-	outw(0x0008, base + 0x04);
-	outw(0x0002, base + 0x06);
-}
-
-
-static void disable_watchdogs(void)
-{
-//	disable_sio_watchdog(NSC_WD_DEV);
-	disable_ich5_watchdog();
-	print_debug("Watchdogs disabled\n");
-}
-




More information about the coreboot mailing list