[coreboot] New patch to review for coreboot: ebf8e44 persimmon: Add usb3 dev in devicetree
Kerry Sheh (shekairui@gmail.com)
gerrit at coreboot.org
Thu Sep 22 12:48:37 CEST 2011
Kerry Sheh (shekairui at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/232
-gerrit
commit ebf8e4438b1343816cf4e6b27a891c1ef25476cc
Author: Kerry Sheh <shekairui at gmail.com>
Date: Thu Sep 22 18:56:47 2011 +0800
persimmon: Add usb3 dev in devicetree
Change-Id: If060ccb43df7fbe88bafc61e9e600a9120575437
Signed-off-by: Kerry Sheh <kerry.she at amd.com>
Signed-off-by: Kerry Sheh <shekairui at gmail.com>
---
src/mainboard/amd/persimmon/devicetree.cb | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb
index 7da2169..fe87bca 100644
--- a/src/mainboard/amd/persimmon/devicetree.cb
+++ b/src/mainboard/amd/persimmon/devicetree.cb
@@ -87,6 +87,8 @@ chip northbridge/amd/agesa/family14/root_complex
device pci 15.1 off end # PCIe PortB
device pci 15.2 off end # PCIe PortC
device pci 15.3 off end # PCIe PortD
+ device pci 16.0 off end # OHCI-USB3
+ device pci 16.2 off end # UHCI-USB3
register "gpp_configuration" = "0" #4:0:0:0 (really need to disable all 4 somehow)
register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
end #southbridge/amd/cimx/sb800
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