[coreboot] Patch set updated for coreboot: 5d309cb Add IT8721F support
QingPei Wang (wangqingpei@gmail.com)
gerrit at coreboot.org
Tue Sep 13 07:37:51 CEST 2011
QingPei Wang (wangqingpei at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/204
-gerrit
commit 5d309cb75821600495e77769b225b89476de8493
Author: QingPei Wang <wangqingpei at gmail.com>
Date: Tue Sep 13 13:35:43 2011 +0800
Add IT8721F support
only the serial port is tested, keyboard/mouse are gonna
to be tested later, it may also need some more patches
to make it work completely.
Change-Id: Ie9464d01c5d5760ebc800b3cd15a4ab2bad2e09f
Signed-off-by: QingPei Wang <wangqingpei at gmail.com>
---
src/superio/ite/Kconfig | 2 +
src/superio/ite/Makefile.inc | 1 +
src/superio/ite/it8721f/Makefile.inc | 22 ++++++++
src/superio/ite/it8721f/chip.h | 34 ++++++++++++
src/superio/ite/it8721f/early_serial.c | 93 ++++++++++++++++++++++++++++++++
src/superio/ite/it8721f/it8721f.h | 41 ++++++++++++++
src/superio/ite/it8721f/superio.c | 78 ++++++++++++++++++++++++++
7 files changed, 271 insertions(+), 0 deletions(-)
diff --git a/src/superio/ite/Kconfig b/src/superio/ite/Kconfig
index cb0c571..d045bf4 100644
--- a/src/superio/ite/Kconfig
+++ b/src/superio/ite/Kconfig
@@ -36,3 +36,5 @@ config SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL
default n
config SUPERIO_ITE_IT8718F
bool
+config SUPERIO_ITE_IT8721F
+ bool
diff --git a/src/superio/ite/Makefile.inc b/src/superio/ite/Makefile.inc
index 21f7707..1e734fe 100644
--- a/src/superio/ite/Makefile.inc
+++ b/src/superio/ite/Makefile.inc
@@ -24,3 +24,4 @@ subdirs-y += it8705f
subdirs-y += it8712f
subdirs-y += it8716f
subdirs-y += it8718f
+subdirs-y += it8721f
diff --git a/src/superio/ite/it8721f/Makefile.inc b/src/superio/ite/it8721f/Makefile.inc
new file mode 100644
index 0000000..3908237
--- /dev/null
+++ b/src/superio/ite/it8721f/Makefile.inc
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2011 QingPei Wang <wangqingpei at gmail.com>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+ramstage-$(CONFIG_SUPERIO_ITE_IT8721F) += superio.c
+
diff --git a/src/superio/ite/it8721f/chip.h b/src/superio/ite/it8721f/chip.h
new file mode 100644
index 0000000..3717d19
--- /dev/null
+++ b/src/superio/ite/it8721f/chip.h
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 QingPei Wang <wangqingpei at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_ITE_IT8721F_CHIP_H
+#define SUPERIO_ITE_IT8721F_CHIP_H
+
+#include <device/device.h>
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+extern struct chip_operations superio_ite_it8721f_ops;
+
+struct superio_ite_it8721f_config {
+ struct pc_keyboard keyboard;
+};
+
+#endif
diff --git a/src/superio/ite/it8721f/early_serial.c b/src/superio/ite/it8721f/early_serial.c
new file mode 100644
index 0000000..cf17d0e
--- /dev/null
+++ b/src/superio/ite/it8721f/early_serial.c
@@ -0,0 +1,93 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2006 Uwe Hermann <uwe at hermann-uwe.de>
+ * Copyright (C) 2011 QingPei Wang <wangqingpei at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/romcc_io.h>
+#include "it8721f.h"
+
+/* The base address is 0x2e or 0x4e, depending on config bytes. */
+#define SIO_BASE 0x2e
+#define SIO_INDEX SIO_BASE
+#define SIO_DATA (SIO_BASE + 1)
+
+/* Global configuration registers. */
+#define IT8721F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
+#define IT8721F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
+#define IT8721F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
+#define IT8721F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */
+
+static void it8721f_sio_write(u8 ldn, u8 index, u8 value)
+{
+ outb(IT8721F_CONFIG_REG_LDN, SIO_BASE);
+ outb(ldn, SIO_DATA);
+ outb(index, SIO_BASE);
+ outb(value, SIO_DATA);
+}
+
+static void it8721f_enter_conf(void)
+{
+ u16 port = 0x2e; /* TODO: Don't hardcode! */
+
+ outb(0x87, port);
+ outb(0x01, port);
+ outb(0x55, port);
+ outb((port == 0x4e) ? 0xaa : 0x55, port);
+}
+
+static void it8721f_exit_conf(void)
+{
+ it8721f_sio_write(0x00, IT8721F_CONFIG_REG_CC, 0x02);
+}
+
+/* Select 24MHz CLKIN (48MHz default). */
+void it8721f_24mhz_clkin(void)
+{
+ it8721f_enter_conf();
+ it8721f_sio_write(0x00, IT8721F_CONFIG_REG_CLOCKSEL, 0x1);
+ it8721f_exit_conf();
+}
+
+
+/* Enable the serial port(s). */
+void it8721f_enable_serial(device_t dev, u16 iobase)
+{
+ /* (1) Enter the configuration state (MB PnP mode). */
+ it8721f_enter_conf();
+
+ /* (2) Modify the data of configuration registers. */
+
+ /*
+ * Select the chip to configure (if there's more than one).
+ * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
+ * If this register is not written, both chips are configured.
+ */
+
+ /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CONFIGSEL, 0x00); */
+
+ /* Enable serial port(s). */
+ it8721f_sio_write(IT8721F_SP1, 0x30, 0x1); /* Serial port 1 */
+ it8721f_sio_write(IT8721F_SP2, 0x30, 0x1); /* Serial port 2 */
+
+ /* Clear software suspend mode (clear bit 0). TODO: Needed? */
+ /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_SWSUSP, 0x00); */
+
+ /* (3) Exit the configuration state (MB PnP mode). */
+ it8721f_exit_conf();
+}
diff --git a/src/superio/ite/it8721f/it8721f.h b/src/superio/ite/it8721f/it8721f.h
new file mode 100644
index 0000000..2242a2e
--- /dev/null
+++ b/src/superio/ite/it8721f/it8721f.h
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2006 Uwe Hermann <uwe at hermann-uwe.de>
+ * Copyright (C) 2011 QingPei Wang <wangqingpei at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_ITE_IT8721F_IT8721F_H
+#define SUPERIO_ITE_IT8721F_IT8721F_H
+
+#define IT8721F_FDC 0x00 /* Floppy */
+#define IT8721F_SP1 0x01 /* Com1 */
+#define IT8721F_SP2 0x02 /* Com2 */
+#define IT8721F_PP 0x03 /* Parallel port */
+#define IT8721F_EC 0x04 /* Environment controller */
+#define IT8721F_KBCK 0x05 /* PS/2 keyboard */
+#define IT8721F_KBCM 0x06 /* PS/2 mouse */
+#define IT8721F_GPIO 0x07 /* GPIO */
+#define IT8721F_IR 0x0a /* Consumer IR */
+
+#if defined(__PRE_RAM__) && !defined(__ROMCC__)
+void it8721f_24mhz_clkin(void);
+void it8721f_disable_reboot(void);
+void it8721f_enable_serial(device_t dev, u16 iobase);
+#endif
+
+#endif
diff --git a/src/superio/ite/it8721f/superio.c b/src/superio/ite/it8721f/superio.c
new file mode 100644
index 0000000..846afef
--- /dev/null
+++ b/src/superio/ite/it8721f/superio.c
@@ -0,0 +1,78 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2006 Uwe Hermann <uwe at hermann-uwe.de>
+ * Copyright (C) 2011 QingPei Wang <wangqingpei at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <device/device.h>
+#include <device/pnp.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include <stdlib.h>
+#include "chip.h"
+#include "it8721f.h"
+
+static void init(device_t dev)
+{
+ struct superio_ite_it8721f_config *conf = dev->chip_info;
+
+ if (!dev->enabled)
+ return;
+
+ switch (dev->path.pnp.device) {
+ case IT8721F_FDC: /* TODO. */
+ break;
+ case IT8721F_PP: /* TODO. */
+ break;
+ case IT8721F_EC: /* TODO. */
+ break;
+ case IT8721F_KBCK:
+ pc_keyboard_init(&conf->keyboard);
+ break;
+ case IT8721F_KBCM: /* TODO. */
+ break;
+ case IT8721F_IR: /* TODO. */
+ break;
+ }
+}
+
+static struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = pnp_set_resources,
+ .enable_resources = pnp_enable_resources,
+ .enable = pnp_enable,
+ .init = init,
+};
+
+/* TODO: FDC, PP, EC, KBCM, IR. */
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, IT8721F_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, IT8721F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0}, },
+ { &ops, IT8721F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
+};
+
+static void enable_dev(struct device *dev)
+{
+ pnp_enable_devices(dev, &pnp_ops,
+ ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_ite_it8721f_ops = {
+ CHIP_NAME("ITE IT8721F Super I/O")
+ .enable_dev = enable_dev,
+};
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