[coreboot] New patch to review: 7d680c9 append to the last patch.

QingPei Wang (wangqingpei@gmail.com) gerrit at coreboot.org
Tue Sep 6 03:36:10 CEST 2011


QingPei Wang (wangqingpei at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/203

-gerrit

commit 7d680c9ca12758ca72f27c6810bbc99714dd015e
Author: QingPei Wang <wangqingpei at gmail.com>
Date:   Tue Sep 6 09:22:38 2011 +0800

    append to the last patch.
    
    make coreboot could loop up the CPU table to find the PH-E0.
    
    Change-Id: Ie1892168254e507404b0de8196f35778e22f3b26
    Signed-off-by: QingPei Wang <wangqingpei at gmail.com>
---
 src/cpu/amd/model_10xxx/model_10xxx_init.c |    1 +
 src/cpu/amd/model_10xxx/update_microcode.c |    2 ++
 src/northbridge/amd/amdmct/amddefs.h       |    3 ++-
 3 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c
index 2e8bbfe..cf11135 100644
--- a/src/cpu/amd/model_10xxx/model_10xxx_init.c
+++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c
@@ -157,6 +157,7 @@ static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_AMD, 0x100F63 },           /* DA-C3 */
 	{ X86_VENDOR_AMD, 0x100F80 },           /* HY-D0 */
 	{ X86_VENDOR_AMD, 0x100F81 },           /* HY-D1 */
+	{ X86_VENDOR_AMD, 0x100FA0 },           /* PH-E0 */
 	{ 0, 0 },
 };
 
diff --git a/src/cpu/amd/model_10xxx/update_microcode.c b/src/cpu/amd/model_10xxx/update_microcode.c
index fa3b4f8..a9faafa 100644
--- a/src/cpu/amd/model_10xxx/update_microcode.c
+++ b/src/cpu/amd/model_10xxx/update_microcode.c
@@ -51,6 +51,7 @@ static const u8 microcode_updates[] __attribute__ ((aligned(16))) = {
  * 00100F62h (DA-C2)     1062h                  0100009Fh
  * 00100F63h (DA-C3)     1043h                  010000b6h
  * 00100F81h (HY-D1)     1081h                  010000c4h
+ * 00100FA0h (PH-E0)     10A0h                  010000bfh
  */
 
 #include CONFIG_AMD_UCODE_PATCH_FILE
@@ -78,6 +79,7 @@ static u32 get_equivalent_processor_rev_id(u32 orig_id) {
 		0x100f62, 0x1062,
 		0x100f63, 0x1043,
 		0x100f81, 0x1081,
+		0x100fa0, 0x10A0,
 	};
 
 	u32 new_id;
diff --git a/src/northbridge/amd/amdmct/amddefs.h b/src/northbridge/amd/amdmct/amddefs.h
index 7852668..d302085 100644
--- a/src/northbridge/amd/amdmct/amddefs.h
+++ b/src/northbridge/amd/amdmct/amddefs.h
@@ -46,6 +46,7 @@
 #define	AMD_RB_C3	0x08000000	/* ??? C3 */
 #define	AMD_DA_C3	0x10000000	/* XXXX C3 */
 #define	AMD_HY_D1	0x20000000	/* Istanbul D1 */
+#define AMD_PH_E0	0x40000000	/* Phenom II X4 X6 */
 
 /*
  * Groups - Create as many as you wish, from the above public values
@@ -64,7 +65,7 @@
 #define	AMD_DR_GT_B0	(AMD_DR_ALL & ~(AMD_DR_B0))
 #define	AMD_DR_GT_Bx	(AMD_DR_ALL & ~(AMD_DR_Ax | AMD_DR_Bx))
 #define	AMD_DR_ALL	(AMD_DR_Bx)
-#define	AMD_FAM10_ALL	(AMD_DR_ALL | AMD_RB_C2 | AMD_HY_D0 | AMD_DA_C3 | AMD_DA_C2 | AMD_RB_C3 | AMD_HY_D1)
+#define	AMD_FAM10_ALL	(AMD_DR_ALL | AMD_RB_C2 | AMD_HY_D0 | AMD_DA_C3 | AMD_DA_C2 | AMD_RB_C3 | AMD_HY_D1 | AMD_PH_E0)
 #define AMD_FAM10_LT_D  (AMD_FAM10_ALL & ~(AMD_HY_D0))
 #define	AMD_FAM10_GT_B0	(AMD_FAM10_ALL & ~(AMD_DR_B0))
 #define	AMD_DA_Cx       (AMD_DA_C2 | AMD_DA_C3)




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