[coreboot] Patch set updated: d40a6ca Use ACPI table area to store cbmem_toc pointer needed for resume
Patrick Georgi (patrick@georgi-clan.de)
gerrit at coreboot.org
Sun Sep 4 21:31:28 CEST 2011
Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/189
-gerrit
commit d40a6caa2a5ab1df3bdb3f5a12f848289afd063d
Author: Tobias Diedrich <ranma+coreboot at tdiedrich.de>
Date: Mon Dec 13 22:42:48 2010 +0100
Use ACPI table area to store cbmem_toc pointer needed for resume
This adds a cbmem_toc_ptr_t structure, which is written just below the FADT,
so we can find it using the FADP information. The actual writing is only
implemented for the Intel 82371EB southbridge.
Also adds code to acpi.c resume codepath to use this pointer when the chipset
has not overridden the weak get_cbmem_toc() function.
Effectively the latter part affects all boards that already implement ACPI S2
or S3 resume, but shouldn't change behaviour since none of them generate the
structure:
asus/m2v
asus/m4a785-m
asus/m2v-mx_se
gigabyte/ma78gm
gigabyte/ma785gmt
jetway/pa78vm5
iwill/dk8_htx
asrock/939a785gmh
amd/dbm690t
amd/mahogany
amd/tilapia_fam10
amd/pistachio
amd/serengeti_cheetah_fam10
amd/serengeti_cheetah
amd/mahogany_fam10
kontron/kt690
iei/kino-780am2-fam10
technexion/tim5690
technexion/tim8690
Change-Id: I9a0eca24d595b9d01d1ba7c81cc7fa0f05ae9229
Signed-off-by: Tobias Diedrich <ranma+coreboot at tdiedrich.de>
Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
---
src/arch/x86/boot/acpi.c | 12 ++++++++++++
src/include/cbmem.h | 7 +++++++
src/lib/cbmem.c | 5 ++++-
src/southbridge/intel/i82371eb/acpi_tables.c | 14 ++++++++++++--
4 files changed, 35 insertions(+), 3 deletions(-)
diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c
index f1be034..abafb04 100644
--- a/src/arch/x86/boot/acpi.c
+++ b/src/arch/x86/boot/acpi.c
@@ -517,6 +517,7 @@ void *acpi_find_wakeup_vector(void)
acpi_rsdt_t *rsdt;
acpi_facs_t *facs;
acpi_fadt_t *fadt;
+ cbmem_toc_ptr_t *cbmem_tocp;
void *wake_vec;
int i;
@@ -537,11 +538,22 @@ void *acpi_find_wakeup_vector(void)
return NULL;
printk(BIOS_DEBUG, "RSDP found at %p\n", rsdp);
+ cbmem_tocp = (cbmem_toc_ptr_t *)(rsdp->rsdt_address - sizeof(cbmem_toc_ptr_t));
rsdt = (acpi_rsdt_t *) rsdp->rsdt_address;
end = (char *)rsdt + rsdt->header.length;
printk(BIOS_DEBUG, "RSDT found at %p ends at %p\n", rsdt, end);
+ if (get_cbmem_toc() == 0) {
+ if (cbmem_tocp->sig != CBMEM_TOC_PTR_SIG) {
+ printk(BIOS_DEBUG, "cbmem toc pointer not found at %p (sig %08x sz %lu)\n", cbmem_tocp, cbmem_tocp->sig, sizeof(cbmem_toc_ptr_t));
+ return NULL;
+ }
+ set_cbmem_toc(cbmem_tocp->ptr);
+ } else {
+ printk(BIOS_DEBUG, "cbmem toc is at %p\n", get_cbmem_toc());
+ }
+
for (i = 0; ((char *)&rsdt->entry[i]) < end; i++) {
fadt = (acpi_fadt_t *)rsdt->entry[i];
if (strncmp((char *)fadt, "FACP", 4) == 0)
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 7c5ec07..6bafa1e 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -41,6 +41,13 @@ extern uint64_t high_tables_base, high_tables_size;
#define CBMEM_ID_SMBIOS 0x534d4254
#define CBMEM_ID_NONE 0x00000000
+#define CBMEM_TOC_PTR_SIG 0x43425443
+
+typedef struct cbmem_toc_ptr {
+ u32 sig;
+ void *ptr;
+} __attribute__((packed)) cbmem_toc_ptr_t;
+
void cbmem_initialize(void);
void cbmem_init(u64 baseaddr, u64 size);
diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c
index 202f521..516f557 100644
--- a/src/lib/cbmem.c
+++ b/src/lib/cbmem.c
@@ -39,6 +39,9 @@ struct cbmem_entry {
#ifndef __PRE_RAM__
static struct cbmem_entry *bss_cbmem_toc;
+/* chipset can override get/set_cbmem_toc to store the cbmem_toc address
+ * in nvram if available */
+
struct cbmem_entry *__attribute__((weak)) get_cbmem_toc(void)
{
return bss_cbmem_toc;
@@ -46,7 +49,7 @@ struct cbmem_entry *__attribute__((weak)) get_cbmem_toc(void)
void __attribute__((weak)) set_cbmem_toc(struct cbmem_entry * x)
{
- /* do nothing, this should be called by chipset to save TOC in NVRAM */
+ bss_cbmem_toc = x;
}
#else
diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c
index 2173a3d..1291c2d 100644
--- a/src/southbridge/intel/i82371eb/acpi_tables.c
+++ b/src/southbridge/intel/i82371eb/acpi_tables.c
@@ -26,6 +26,7 @@
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci_ids.h>
+#include <cbmem.h>
#include "i82371eb.h"
extern const unsigned char AmlCode[];
@@ -104,6 +105,7 @@ unsigned long __attribute__((weak)) acpi_fill_ssdt_generator(unsigned long curre
unsigned long __attribute__((weak)) write_acpi_tables(unsigned long start)
{
unsigned long current;
+ cbmem_toc_ptr_t *cbmem_tocp;
acpi_rsdp_t *rsdp;
acpi_rsdt_t *rsdt;
acpi_fadt_t *fadt;
@@ -113,20 +115,28 @@ unsigned long __attribute__((weak)) write_acpi_tables(unsigned long start)
acpi_header_t *dsdt;
/* Align ACPI tables to 16 byte. */
- start = (start + 0x0f) & -0x10;
- current = start;
+ current = ALIGN(start, 16);
printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
/* We need at least an RSDP and an RSDT table. */
rsdp = (acpi_rsdp_t *) current;
current += sizeof(acpi_rsdp_t);
+
+ /* put cbmem toc ptr structure directly below rsdt */
+ printk(BIOS_INFO, "ACPI: Writing cbmem_toc pointer at %lx...\n", current);
+ cbmem_tocp = (cbmem_toc_ptr_t *) current;
+ current += sizeof(cbmem_toc_ptr_t);
+
rsdt = (acpi_rsdt_t *) current;
current += sizeof(acpi_rsdt_t);
/* Clear all table memory. */
memset((void *) start, 0, current - start);
+ cbmem_tocp->sig = CBMEM_TOC_PTR_SIG;
+ cbmem_tocp->ptr = get_cbmem_toc();
+
acpi_write_rsdp(rsdp, rsdt, NULL);
acpi_write_rsdt(rsdt);
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