[coreboot] New patch to review: b8fe009 Report GSE chipset and warn if the code has been compiled for the wrong chipset.

[Patrick Georgi (patrick@georgi-clan.de)]

Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/184

-gerrit

commit b8fe009787a26f079b236a26ebc0c6e676c0c884
Author: Stefan Reinauer <stefan.reinauer at coreboot.org>
Date:   Fri Apr 1 22:33:25 2011 +0200

    Report GSE chipset and warn if the code has been compiled for the wrong chipset.
    
    It would be nicer to unify the code so that it does all detection at runtime
    instead of compile time (but that would also significantly increase code size)
    so if someone else wants to give it a shot...
    
    Change-Id: Idc67bdf7a6ff2b78dc8fc67a0da5ae7a4c0a3bf0
    Signed-off-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
    Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
---
 src/northbridge/intel/i945/early_init.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 21efc37..197c58f 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -42,7 +42,7 @@ static void i945m_detect_chipset(void)
 		printk(BIOS_INFO, "Mobile Intel(R) 82945GM/GME Express");
 		break;
 	case 2:
-		printk(BIOS_INFO, "Mobile Intel(R) 82945GMS/GU Express");
+		printk(BIOS_INFO, "Mobile Intel(R) 82945GMS/GU/GSE Express");
 		break;
 	case 3:
 		printk(BIOS_INFO, "Mobile Intel(R) 82945PM Express");
@@ -91,6 +91,9 @@ static void i945m_detect_chipset(void)
 		printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8);	/* Others reserved. */
 	}
 	printk(BIOS_DEBUG, "\n");
+#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GC)
+	printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n");
+#endif
 }
 
 static void i945_detect_chipset(void)
@@ -137,6 +140,9 @@ static void i945_detect_chipset(void)
 		printk(BIOS_INFO, "unknown max. RAM clock (%02x).", reg8);	/* Others reserved. */
 	}
 	printk(BIOS_DEBUG, "\n");
+#if defined(CONFIG_NORTHBRIDGE_INTEL_I945GM)
+	printk(BIOS_ERR, "coreboot is compiled for the wrong chipset.\n");
+#endif
 }
 
 static void i945_setup_bars(void)