[coreboot] New patch to review for coreboot: 8713588 Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c.

Stefan Reinauer (stefan.reinauer@coreboot.org) gerrit at coreboot.org
Sun Oct 30 20:31:38 CET 2011


Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/360

-gerrit

commit 87135886bc6558aaa43da2189da863362a488e45
Author: Stefan Reinauer <stefan.reinauer at coreboot.org>
Date:   Sun Oct 30 20:30:48 2011 +0100

    Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c.
    
    Change-Id: I3ccb3860207e1b3ccac4313f7b537c434af5166f
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
---
 src/southbridge/amd/sr5650/pcie.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/southbridge/amd/sr5650/pcie.c b/src/southbridge/amd/sr5650/pcie.c
index 37743ca..eebe711 100755
--- a/src/southbridge/amd/sr5650/pcie.c
+++ b/src/southbridge/amd/sr5650/pcie.c
@@ -370,8 +370,8 @@ static void gpp3a_cpl_buf_alloc(device_t nb_dev, device_t dev)
 		slave_cpl = (u8 *)&pGpp111111;
 		break;
 	default:  /* shouldn't be here. */
-		printk(BIOS_DEBUG, "buggy gpp3a_configuration\n");
-		break;
+		printk(BIOS_WARNING, "buggy gpp3a_configuration\n");
+		return;
 	}
 
 	value = slave_cpl[dev_index - 4];




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