[coreboot] Patch set updated for coreboot: 74340e5 Set CACHE_AS_RAM for socket MPGA604
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Sat Oct 22 19:41:48 CEST 2011
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/323
-gerrit
commit 74340e5652c713d1baedc8c6ee400ea6ed7159c7
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Sat Oct 22 19:08:24 2011 +0300
Set CACHE_AS_RAM for socket MPGA604
Any mainboard with intel MPGA604 socket will now include
initialisation from cpu/intel/car/cache_as_ram.inc in the
romstage. Tyan s5735 did this already without TINY_BOOTBLOCK.
Change-Id: I1e7039b628be74477fe9ff884d121b0681f1ecbe
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/arch/x86/Makefile.inc | 7 -------
src/cpu/intel/socket_mPGA604/Kconfig | 1 +
src/cpu/intel/socket_mPGA604/Makefile.inc | 2 ++
src/mainboard/tyan/s2735/Kconfig | 1 -
4 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 65c2a92..7e71518 100755
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -200,13 +200,6 @@ endif
crt0s += $(cpu_incs)
-#
-# FIXME move to CPU_INTEL_SOCKET_MPGA604
-#
-ifeq ($(CONFIG_BOARD_TYAN_S2735),y)
-crt0s += $(src)/cpu/intel/car/cache_as_ram.inc
-endif
-
ifeq ($(CONFIG_LLSHELL),y)
crt0s += $(src)/arch/x86/llshell/llshell.inc
endif
diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig
index 2fc27cf..61e8637 100644
--- a/src/cpu/intel/socket_mPGA604/Kconfig
+++ b/src/cpu/intel/socket_mPGA604/Kconfig
@@ -6,6 +6,7 @@ config CPU_INTEL_SOCKET_MPGA604
select MMX
select SSE
select UDELAY_TSC
+ select CACHE_AS_RAM
# mPGA604 are usually Intel Netburst CPUs which should have SSE2
# but the ramtest.c code on the Dell S1850 seems to choke on
diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc
index 1404e84..ad88892 100644
--- a/src/cpu/intel/socket_mPGA604/Makefile.inc
+++ b/src/cpu/intel/socket_mPGA604/Makefile.inc
@@ -10,3 +10,5 @@ subdirs-y += ../../x86/smm
subdirs-y += ../microcode
subdirs-y += ../hyperthreading
+cpu_incs += $(src)/cpu/intel/car/cache_as_ram.inc
+
diff --git a/src/mainboard/tyan/s2735/Kconfig b/src/mainboard/tyan/s2735/Kconfig
index cd030a5..36739f3 100644
--- a/src/mainboard/tyan/s2735/Kconfig
+++ b/src/mainboard/tyan/s2735/Kconfig
@@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_MP_TABLE
select UDELAY_TSC
select HAVE_OPTION_TABLE
- select CACHE_AS_RAM
select USE_WATCHDOG_ON_BOOT
select BOARD_ROMSIZE_KB_512
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