[coreboot] Patch set updated for coreboot: 80f52b7 make INT[EFGH]# of vt8237 configurable as gpio via devicetree

[Florian Zumbiehl]

Florian Zumbiehl just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/386

-gerrit

commit 80f52b7bcd10a5c28ffa9a7ad3e64529df6f7085
Author: Florian Zumbiehl <florz at florz.de>
Date:   Mon Nov 21 03:10:47 2011 +0100

    make INT[EFGH]# of vt8237 configurable as gpio via devicetree
    
    Change-Id: I70202d81ddd1b0a00eddca4acabc621e5783e805
    Signed-off-by: Florian Zumbiehl <florz at florz.de>
---
 src/southbridge/via/vt8237r/chip.h |    2 ++
 src/southbridge/via/vt8237r/lpc.c  |    9 ++++++++-
 2 files changed, 10 insertions(+), 1 deletions(-)

diff --git a/src/southbridge/via/vt8237r/chip.h b/src/southbridge/via/vt8237r/chip.h
index 2e24fac..bbba5e4 100644
--- a/src/southbridge/via/vt8237r/chip.h
+++ b/src/southbridge/via/vt8237r/chip.h
@@ -69,6 +69,8 @@ struct southbridge_via_vt8237r_config {
 
 	u8 usb2_dpll_set;
 	u8 usb2_dpll_delay;
+
+	u8 int_efgh_as_gpio;
 };
 
 #endif /* SOUTHBRIDGE_VIA_VT8237R_CHIP_H */
diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c
index 207dfdb..43a9394 100644
--- a/src/southbridge/via/vt8237r/lpc.c
+++ b/src/southbridge/via/vt8237r/lpc.c
@@ -421,10 +421,13 @@ static void vt8237s_init(struct device *dev)
 static void vt8237_common_init(struct device *dev)
 {
 	u8 enables, byte;
+	struct southbridge_via_vt8237r_config *cfg;
 #if !CONFIG_EPIA_VT8237R_INIT
 	unsigned char pwr_on;
 #endif
 
+	cfg = dev->chip_info;
+
 	/* Enable addr/data stepping. */
 	byte = pci_read_config8(dev, PCI_COMMAND);
 	byte |= PCI_COMMAND_WAIT;
@@ -509,7 +512,11 @@ static void vt8237_common_init(struct device *dev)
 	 *     | bit 1=1 works for Aaron at VIA, bit 1=0 works for jakllsch
 	 *   0 | Dynamic Clock Gating Main Switch (1=Enable)
 	 */
-	pci_write_config8(dev, 0x5b, 0xb);
+	if (cfg && cfg->int_efgh_as_gpio) {
+		pci_write_config8(dev, 0x5b, 0x9);
+	} else {
+		pci_write_config8(dev, 0x5b, 0xb);
+	}
 
 	/* configure power state of the board after loss of power */
 	if (get_option(&pwr_on, "power_on_after_fail") < 0)