[coreboot] New patch to review for coreboot: 4f13c1e Only BSP CPU writes CMOS in bootblock code

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Tue Nov 22 19:17:23 CET 2011


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/446

-gerrit

commit 4f13c1e5ae4dc77e33b30af056fcdee4fea892e8
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Tue Nov 22 19:20:22 2011 +0200

    Only BSP CPU writes CMOS in bootblock code
    
    CMOS accesses are not safe for multi-processor and only the BSP CPU
    should count reboots and test CMOS sanity.
    
    A questionable single byte CMOS read access from AP CPUs remains.
    
    Change-Id: I29118e33c07c0080c94abb90f703e38312c72432
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/init/bootblock_normal.c |   18 ++++++++++++++----
 src/arch/x86/init/bootblock_simple.c |    4 ++--
 2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/src/arch/x86/init/bootblock_normal.c b/src/arch/x86/init/bootblock_normal.c
index db9d0f9..a0b7b37 100644
--- a/src/arch/x86/init/bootblock_normal.c
+++ b/src/arch/x86/init/bootblock_normal.c
@@ -3,18 +3,28 @@
 
 static void main(unsigned long bist)
 {
+	unsigned long entry;
+	int boot_mode;
+	
 	if (boot_cpu()) {
 		bootblock_northbridge_init();
 		bootblock_southbridge_init();
 		bootblock_cpu_init();
-	}
 
 #if CONFIG_USE_OPTION_TABLE
-	sanitize_cmos();
+		sanitize_cmos();
 #endif
+		boot_mode = do_normal_boot();
+	} else {
+	
+		/* Questionable single byte read from CMOS.
+		 * Do not add any other CMOS access in the
+		 * bootblock for AP CPUs.
+		 */
+		boot_mode = last_boot_normal();
+	}
 
-	unsigned long entry;
-	if (do_normal_boot())
+	if (boot_mode)
 		entry = findstage("normal/romstage");
 	else
 		entry = findstage("fallback/romstage");
diff --git a/src/arch/x86/init/bootblock_simple.c b/src/arch/x86/init/bootblock_simple.c
index 5d7c611..41f73b4 100644
--- a/src/arch/x86/init/bootblock_simple.c
+++ b/src/arch/x86/init/bootblock_simple.c
@@ -6,11 +6,11 @@ static void main(unsigned long bist)
 		bootblock_northbridge_init();
 		bootblock_southbridge_init();
 		bootblock_cpu_init();
-	}
 
 #if CONFIG_USE_OPTION_TABLE
-	sanitize_cmos();
+		sanitize_cmos();
 #endif
+	}
 
 	const char* target1 = "fallback/romstage";
 	unsigned long entry;




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