[coreboot] New patch to review for coreboot: c7965e3 i82801gx: Use CMOS variable if available for power-on on power failure
Patrick Georgi (patrick@georgi-clan.de)
gerrit at coreboot.org
Tue Nov 22 14:14:16 CET 2011
Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/443
-gerrit
commit c7965e36565a1674eb8fbb7167b5390dd543a3a4
Author: Patrick Georgi <patrick.georgi at secunet.com>
Date: Tue Nov 22 10:28:46 2011 +0100
i82801gx: Use CMOS variable if available for power-on on power failure
We used a hard coded value for some reason. Don't do that, but use CMOS
instead.
Change-Id: Ib83aa07a3e55bed075150354a060317ebc9d5ba7
Signed-off-by: Patrick Georgi <patrick.georgi at secunet.com>
---
src/southbridge/intel/i82801gx/smihandler.c | 6 ++----
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index 48375e4..85ee2b4 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -279,11 +279,9 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat
u8 reg8;
u32 reg32;
u8 slp_typ;
- /* FIXME: the power state on boot should be read from
- * CMOS or even better from GNVS. Right now it's hard
- * coded at compile time.
- */
+
u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+ get_option(&s5pwr, "power_on_after_fail");
/* First, disable further SMIs */
reg8 = inb(pmbase + SMI_EN);
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